ChanServ changed the topic of #asahi-re to: Asahi Linux: porting Linux to Apple Silicon macs | Hardware / boot process / firmware interface reverse engineering | WARNING: this channel (only) may contain binary reverse engineering discussion | RE policy: https://alx.sh/re (MANDATORY READ) | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-re
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<alyssa> GART...
<alyssa> I'm staring at the device tree and trying to make sense of how GPU memory works
<alyssa> All the dart mappers have `reg` blocks for the dart.
<alyssa> the gpu is special, no registers specified on its mapper.
<alyssa> indeed the GPU doesn't use a DART, it uses a GART. whatever the heck that is.
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<alyssa> I guess that's what AGXArmFirmwareMapper is for.
<alyssa> so, on boot I see macOS reading from a bunch of GPU (`sgx`) registers
<alyssa> right after adding endpoints, but before starting the syslog
<alyssa> possibly reading config registers? it reads twce and values are consistent
<alyssa> TypeError: unsupported format string passed to NoneType.__format__
<alyssa> uhoh
* alyssa patches m1n1
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<alyssa> I suspect somebody will want to pop those kexts into ghidra before trying to make sense of the i/o traces
<alyssa> the IOP interface (`gfx-asc`) is totally standard, m1n1's existing infrastructure handles it fine
<alyssa> the GPU registers themselves though (`sgx`) are novel, as is the GART mapper
<alyssa> and here's the kicker-- IOP is all based on shared memory. No DART, no clue where it is.
<alyssa> the good news is that GART seems to be organized like a normal MMU
<alyssa> (like the Arm CPU MMU)
<alyssa> three layers of translation tables-- as I understand this is much more complex than DART, which makes sense as the memory requirements of a CPU/GPU are far more complicated than an ordinary peripheral
<alyssa> 16k pages -- unsurprising.
<alyssa> GART comes in ordinary, "legacy" and "secure" flavour
<alyssa> Presumably the complexity is for supporting process isolation, hardware backed DRM, etc.
<alyssa> not sure it warrants yet another IOMMU but here we are
<Graypup_> apple soc designers: "oops! all iommu"
<alyssa> yo, I heard you like IOMMU
<alyssa> 16k pages and aligned pointers means 14 bits are free at the bottom of pointers.
<alyssa> Presumably the GART format takes good advantage of that.
<sven> fwiw, DART is technically three levels as well (first one in MMIO and then two levels of pagestables)
<sven> AGXArmFirmwareMapper sounds like it just maps the firmware though
<sven> and huh... mapper-gfx-asc is strange
<sven> i *really* hope you can implement that iommu inside the gfx driver and not inside the iommu framework
<sven> because that iommu framework only supports a single iommu type per bus and i'm not keen on changing that
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<alyssa> sven: Ohv boy.
<sven> alyssa: so that AGXArmFirmwareMapper is just a small wrapper around the actual IOMMU
<sven> i think they built it because they also need the normal RTKit shared memory buffers to go through GART
<sven> i.e. that whole node in the ADT is essentially an Apple hack :D
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<alyssa> sven: understood, I guess I suspected as much
<alyssa> I mean, I imagine the capabilities of GART are a strict superset of DART?
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<alyssa> marcan: Do we know what's happening on all the other DCP endpoints?
<alyssa> e.g. mcdp29xx which apparently is the DP->HDMI chip
<sven> or maybe it's an entirely different thing
<alyssa> sven: I mean correct me if I'm wrong but DART is made to be simple
<sven> but afaik DART has stuff like subpage-protection. no idea if GART has that as well
<alyssa> not much point for graphics ...
<sven> it'll certainly be capable of creating IOVA -> physaddr mappings just like DART can
<alyssa> (for 16k pages. certainly there's a point for 2MB pages ha)
<sven> and i suspect the pagetable format is going to be very similar
<marcan> alyssa: those are driven by different drivers
<marcan> semi-autonomously afaik
<marcan> I'm not sure how much we have to care at this point
<alyssa> marcan: Woof
<sven> hm, might only be important to decide how to handle all the common rtkit stuff for the kernel
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