ChanServ changed the topic of #asahi-re to: Asahi Linux: porting Linux to Apple Silicon macs | Hardware / boot process / firmware interface reverse engineering | WARNING: this channel (only) may contain binary reverse engineering discussion | RE policy: https://alx.sh/re (MANDATORY READ) | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-re
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<rqou_> bluetooth seems to have a broadcom chipcommon at BAR0+0x3000
<rqou_> i still don't have tracing working, but i REd the macos driver a bunch
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<rqou_> ah, apparently i can just dump mmio ranges from ioregistryexplorer
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<rqou_> i _think_ i understand how to upload bluetooth firmware now, and have a vague idea that there exist descriptor rings and doorbells for 7(?) streams of data, but i'm blocked on not having any good way to prototype a driver
<rqou_> the pcie interface doesn't look _that_ complicated
<rqou_> i think but haven't confirmed that hci/sco/acl are tunneled on top
<rqou_> the macos drivers are really really overengineered
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<rqou_> hmm ok, there's definitely something i don't understand happening, because reading one of the "bad" registers (that macos is blatantly reading) from a "proper" linux pci driver crashes the system still
<rqou_> so macos is doing something i don't understand to make the device not crash
<rqou_> literally the first access macos does is to read BAR0+0x5908, according to the hv trace
<rqou_> do i have to do something with the config space? i don't really know much about how pci works
<rqou_> how would i hv trace the config space?
<kode54> is the BAR mapped and accessible?
<kode54> (I'm being an obvious shit, right now, because memory access issue is the only thing I can think of)
<kode54> (I've barely had any kernel dev experience, just scan the tree for my scant commits)
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<rqou_> the BAR is accessible because i can read BAR0+0x302C
<kode54> hmm
<rqou_> but if i read BAR0+0x5908 (which macos definitely does!) it hangs the entire system
<rqou_> hmm, AppleConvergedPCI::setupVendorSpecificConfigurationGated might be important
<rqou_> it writes something to a bunch of pci config space registers at around 0x80
<rqou_> and then prints "window setup done"
<rqou_> lmao ok i chased some vtable hell and this is probably it
<rqou_> it writes some "BAR window mapping" magic numbers to the config space
<rqou_> there's definitely a lot of parts of this that are similar to broadcom wifi chips, but also a lot of it is different
<rqou_> yup that was it
<rqou_> no more crashing now
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<rqou_> afaict i've successfully booted the bluetooth firmware now
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<rqou_> (the only evidence is that there is a register that changed from "0" to "2")
<rqou_> need to do more tracing to figure out how descriptor rings work
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<rqou_> tfw i kept wondering where a giant pile of config settings were coming from, but they're in the info.plist
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<rqou_> sven: ok i bought a thunderbolt widget just to answer the DART question you had asked about
<rqou_> from the build params: version is still 1.0, supports full bypass (unlike the prores/scaler/avd ones which do not), 42-bit PA, 32-bit VA (not 36-bit), 64 streams (not 16)
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<rqou_> sven: i also tested the 36-bit iova on the prores DART and it seems to work
<rqou_> bit31 of register 0 is also set, but i don't know what that means
<rqou_> somebody better start looking at thunderbolt soon or i will be sad
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