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<sima>
alyssa, thanks for typing up the more reliable tiler heap heuristics, saved me some work
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<sima>
bbrezillon, ^^ was about to type that up for you re your "possible perf regressions" comment from yesterday
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<sima>
bbrezillon, it's probably still reasonable to have the page fault handler at least try to save the day with GFP_NORECLAIM allocations
<tanty>
cmarcelo, from Igalia's side I don't think we are using vkrunner as a library.
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<bbrezillon>
sima: yeah, alyssa's comment got me thinking to, and I think I can come up with something for panthor's tiler heap that would try a non-blocking allocation, then, if it fails, fallback to incremental rendering, and defer blocking allocation to a separate workqueue, so more chunks are available next time the tiler needs them
<bbrezillon>
but I still have no solution for older GPUs, which we're asked to support Vulkan on, and which I'd love to use the same transparent shrinker (swapout on reclaim, swapin on next VM use) on
<sima>
bbrezillon, I have a really horrendous idea
<bbrezillon>
shoot
<sima>
let me do some workout to decided whether I want to attach my name to it before I go type
<sima>
it's like ... terrible
<bbrezillon>
:D
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<sima>
it might also not work, depending how picky the hw is
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* bbrezillon
compulsively hitting the "Get Mail" button to see sima's crazy idea :-)
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<sima>
bbrezillon, I'll ping you
<sima>
also got distracted writing some notes instead of doing work-out
<bbrezillon>
Good training
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<daniels>
sima: as long as it's better than forcing all rendering to be completely synchronous on hardware which can't do incremental rendering :)
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<sima>
daniels, it's not strictly better, but I think like overcommit we can pile up enough very clever tricks that it's good enough in practice without breaking too many fundamental pillars
<sima>
also it's getting worse, the longer I'm drafting notes :-P
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<sima>
bbrezillon, daniels I'm sorry :-(
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<bbrezillon>
sima: don't be. The global mempool idea is something Arm wanted to have for this kind of on-demand/unpredictible allocations (it's called JIT-something in kbase)
<sima>
bbrezillon, even for panthor?
<sima>
I guess it might still be beneficial, but maybe with slightly less aggressive limit heuristics so we don't waste too much memory
<sima>
bbrezillon, and the horrible thing is just step 2, trying to get an actual dynamic memory requirement out of a dead context
<bbrezillon>
oh yeah
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<alyssa>
daniels: you don't like mesa statically allocating 128MB for every VkDevice just in case???
<sima>
128MB for you, 128MB for you, 128MB for everyone!
<sima>
who doesn't like that
* MrCooper
was hoping for a car or something
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<alyssa>
unfortunately the witcher 3 is OOMing the 128MB
<alyssa>
so i might need to bump to 512M or something everywhere
<alyssa>
:p
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<kusma>
mareko: I'm having some issues understanding the interaction of AMD_framebuffer_multisample_advanced and ARB_internalformat_query... The problem I see arise when some formats supports higher multisample-counts than others, yet AMD_framebuffer_multisample_advanced says that an implementation *must* support up to MAX_COLOR_FRAMEBUFFER_SAMPLES_AMD samples, and specifying samples higher than that are illegal... That erase that flexibility again,
<kusma>
doesn't it?
<kusma>
We're also applying that limitation in Mesa for all renderbuffers, but I think that should only apply when RenderbufferMultisampleAdvancedAMD is called...
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<daniels>
alyssa: on the bright side, Collabora could really monetise our production-ready branch with awesome memory savings from just reverting to how it was before
<alyssa>
real
<bbrezillon>
$$$$$$
<alyssa>
unrelated, but does anyone else get annoyed by dozens of "Image Type operand of OpTypeSampledImage should not have a Dim of Buffer.' when running vk cts
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<zmike>
yes
<alyssa>
how do we fix this
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<zmike>
impossible
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<alyssa>
k
<melissawen>
if userspace tries an async page flip and gets a EINVAL rejection, userspace will try to perform a sync flip, right? it will try again async flipping or not anymore after the first rejection?
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<zamundaaa[m]>
melissawen: yes, it'll fall back to sync
<zamundaaa[m]>
Or maybe first async with some planes removed or sth. The usual mess with atomic tests
<melissawen>
zamundaaa[m], I see... so userspace can approach the rejection with trial and error?
<emersion>
melissawen: it can fallback to front buffer rendering like Xserver does
<emersion>
ie, mutate the current front buffer
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<melissawen>
So, at some point, AMD driver allocates FB in VRAM but when there is no more space in VRAM, it passes to allocate in GTT without explicitly mention the mem type change. So, the async flip test in IGT started to fail because of this dual mem types :/
<melissawen>
I'm trying to figure out what is the right way to implement this mem type change condition in the IGT test
<melissawen>
considering userspace perspective
<melissawen>
I don't think userspace is aware of these two mem types to decide the right conditions to try to async flip
<emersion>
async flip is allowed to fail for any driver-specific reason
<melissawen>
emersion, yeah, but how to better translate this expectation in the current async flip test?
<melissawen>
maybe just allowing failure, and then skipping the test?
<melissawen>
or trying a different set of planes, for example? or... just failing the test and, that's it?
<emersion>
yeah, i'd say skipping is fine
<emersion>
i wonder how other tests requiring hw features behave?
<emersion>
like, plane tests
<emersion>
(could skip on -EINVAL and hard fail on anything else)
<melissawen>
I suspect current implementation isn't generic enough about hw features. It creates a scenario in which the test should not fail for any reason, but probably this scenario is valid just for a subset of hw.
<emersion>
indeed
<melissawen>
and then specific limitations were added over time
<melissawen>
I wonder if I should add another specific limitation for AMD's case or what hahaha
<melissawen>
I think I'll follow your suggestion to just skip if EINVAL
<melissawen>
thanks .o/\o.
<emersion>
cool, feel free to CC me :P
<melissawen>
sure!
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<cmarcelo>
tanty: thanks good to know. I might write up an MR to start a more wider discussion then.
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<alyssa>
gfxstrand: for sparseBuffer emulation, I'll need to use a different address for loads vs stores/atomics of SSBOs
<alyssa>
I can calculate the required fixup in shader, the buffer descriptor remains the same thing that nvk uses
<alyssa>
any preferences on how that looks like wrt the common code?
<alyssa>
easiest thing for me is probably a special address mode
<alyssa>
or a pair of new modes (one robust, one not)
<alyssa>
I just don't know how much weirdness we are ok putting in lowre_explicit_io
<alyssa>
otoh, if bbrezillon goes thru with sparse on panvk, this will be used there too lol
<sima>
alyssa, well hence the bracketing with the tricks in step 1 and quirks in 3 to try and make sure this doesn't actually ever happen
<sima>
or once per game you run or something like that
<sima>
and I did say this is terrible
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<sima>
bbrezillon, I don't think you gain anything from a background task, because memory reclaim will already try to make more memory available, to help the current job
<sima>
and resizing on the next cs ioctl avoids all the pain with async errors and potential deadlocks
<sima>
I guess I'll reply on-list too
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<mareko>
kusma: yes, that extension doesn't allow different sample counts for different formats
<kusma>
Ack, thanks!
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