11:23 <mwalle> austriancoder: in etnaviv_iommuv2_map() what is iova and paddr? is iova the address the GPU sees which then map to the paddr which is the physical address on the AXI bus (which might then be translated again by the SMMU I guess)?

14:47 <marex> mwalle: austriancoder: oh, it seems that's the same fault I keep running into on stm32mp1

14:47 <marex> mmuv2 , and one of the buffers in MMU is not mapped

14:50 <marex> btw the mp1 has no SMMU enabled

15:37 <mwalle> marex: its mapped to 0x1000 (iova) thus I guess its the command stream buffer itself?

15:37 <mwalle> ie etnaviv_iommu_get_suballoc_va()

15:38 <mwalle> doesn't seem to end up in the SMMU, haven't figured it out yet

15:39 <mwalle> lynxeye mentioned there is a virtual device, seems like the mapping (if dma_alloc_wc() insert the SMMU entry at all) is maybe only for the global device

15:50 <mwalle> marex: hm, but that fault is from the SMMU, if that is not enabled on your board, how can there be a fault? ;)

16:51 <marex> mwalle: in my case, the entry is I think missing in the GPU IOMMUv2

17:19 <mwalle> marex: ok, its definetly present in the GPU MMU in my case.