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tomeu >
icecream95: are you working on a driver for that NPU?
08:14
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tomeu >
I'm doing that for the one in the vim3, which should be very similar IP
08:14
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tomeu >
[ 182.982051] etnaviv-gpu ff100000.gpu: model: GC8000, revision: 7120
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icecream95 >
tomeu: Yup, eventually. How much progress have you made so far?
09:18
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tomeu >
icecream95: I have approached this as another vivante GPU
09:18
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tomeu >
so I'm using the etna_viv RE tools
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tomeu >
have hacked Mesa to compile a very simple opencl kernel and emit the same cmdstream as the blob
09:19
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tomeu >
the kernel driver powers up the HW and I can read and write registers
09:19
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tomeu >
but when I submit my workload the GPU times out
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tomeu >
so I'm looking at what is special about the NPU regarding submission
09:21
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tomeu >
I have assumed that the npu on the 3588 is also based on vivante IP, like in earlier rockchip socs, is that the case?
09:22
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icecream95 >
The NPUs in RK356x and RK3588 are apparently quite different from older SoCs...
09:24
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tomeu >
oh, so they aren't using galcore?
09:26
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tomeu >
"RV1106 and RV1103 use Cortex-A7 CPU and high-performance MCU, built-in Rockchip's self-developed 4th generation NPU"
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tomeu >
hmm, indeed, this seems to be completely different silicon
09:26
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tomeu >
given the mess that vivante is, I would expect it to be easier to write a driver for it
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tomeu >
icecream95: btw, do you have the sources for the kernel module?
09:29
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icecream95 >
What sort of driver though? I don't think that Mesa would be a good fit, it seems far too limited for OpenCL. No FP32 support, AFAIK
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tomeu >
icecream95: does it matter if it isn't opencl compliant? as long as it can run the workloads it is designed to support...
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tomeu >
I'm afraid it has to be opencl, otherwise what are we going to do, write a new API and add a backend for it to all ML frameworks?
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tomeu >
but it doesn't need to be compliant or support everything opencl has
09:33
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icecream95 >
I'm afraid that it'll be too limited even for the simplest "Hello World" CL examples...
09:33
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icecream95 >
Rockchip at least have taken the "write <N> backends" approach
09:33
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icecream95 >
Even some of those supported operations are executed on the CPU
09:35
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tomeu >
yeah, all soc vendors are doing it, but I'm not sure this is an option for us if we want for the backends to be upstream
09:38
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icecream95 >
I think that Rockchip mostly relies on ONNX for supporting all the different frameworks
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icecream95 >
I guess the question is... do we submit a PR to remove the vendor RKNPU code once a driver is written? :)
09:47
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icecream95 >
Though your linked commit appears to be for different hardware
09:49
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tomeu >
ah, true, seems to be targetting a rockchip library on top of the vivante blobs
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tomeu >
but the point was that if there can be a onnx backend for rknpu (whatever the IP is), we could have one for a new API
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tomeu >
though TBH, I'm not looking forward to adding one more API to this soup
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CounterPillow >
My favourite part of the rknpu driver is how it inexplicably has an ioctl to set process niceness
10:56
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CounterPillow >
Like, not niceness of the npu access it seems, just in general
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urja >
is that a way to get around taking higher priority for non-root process?
11:14
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urja >
(that is, you get to open the device, you get to have high priority... lol)
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