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<alyssa>
Coaxing Metal to tell me how bindless textures work seems less effective than just playing with the hardware under Linux and seeing what happens
<alyssa>
so, with flags=3 and everything else as usual, it's looking up "passed uniform + 32-bit register"
<alyssa>
that's enough to emulate bindless but it's not as nice as I was hoping
<alyssa>
what I really want is a "64-bit register" mode
<TellowKrinkle>
So does Metal just have a massive array of texture descriptors that it allocates out of and then uses 32 bit offsets into that array as texture pointers?
<alyssa>
I don't know.
<alyssa>
It's certainly possible.
<alyssa>
That's basically the "heap" model. It's how NVIDIA works at a hardware level, and how DX12 works at an API level.
<alyssa>
while heaps are just as expressive as pointer-style bindless, I guess I'm a bit surprised to not see a way to do real pointers
<alyssa>
given that the hardware is all pointers internally
<alyssa>
Like, my current mental model is that the hardware is internally pointer-style bindless
<alyssa>
and the texture state registers (ts0 etc) and this uniform+reg mode are both conveniences for the driver to emulate binding tables and heaps respectively
<alyssa>
but I'd be surprised if there wasn't a raw pointer mode in here too, if that's what's happening
<alyssa>
where I'm at is, if this is indeed how bindless works on this hardware (and the only way it works), then I can make this work in the drive
<alyssa>
r
<alyssa>
but it seems more likely that we're missing some encodings than that this is really what Apple intended
<alyssa>
---
<alyssa>
By the way, does Metal support atomics on images now?
<TellowKrinkle>
Still no image atomics in Metal
<alyssa>
k. Maybe that'll come in the next version bump then.
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<alyssa>
TellowKrinkle: I think u4 is the SampleURegDesc
<alyssa>
that said, SampleURegDesc is missing a few bits of extensions
<alyssa>
(Unless you can't use the upper bits for this. Again, while possible that seems less likely than I don't know which bits are the extension.)
<TellowKrinkle>
How many unknown bits do we have left at this point?
<alyssa>
enough
<alyssa>
texture_sample has a known SampleURegDesc but no known extension bits
<alyssa>
but q4 and q6 are both plausibly extension
<alyssa>
(8 bits between them)
<alyssa>
wait, q6 is gather stuff at least in part
<alyssa>
and q4 is kill at least in part
<alyssa>
hm
<alyssa>
q6 has like 1 free bit
<alyssa>
and q4 has 1 free bit
<alyssa>
and extensions seem to always be 2-bits, so maybe there is no extension
<alyssa>
just seems .. odd
<alyssa>
but regardless, image_write::u4 being a URegDesc (maybe) is a nice take-home message
<alyssa>
because with that I have enough to implement heaps, even if I'm still unconvinced I should have to
<alyssa>
OTOH, shader code and pipelines and things use a heap-like model too
<alyssa>
in that you only get 32-bits of VA but can place it wherever you want
<alyssa>
so, shrug
<alyssa>
maybe it is in line with the hardware
<alyssa>
my brain is very much still in Arm mode
<TellowKrinkle>
Are arm GPUs all pointers? (I know almost nothing about arm GPUs)
<alyssa>
nah, mali is ... a mix of models that has changed over time
<alyssa>
I guess it's also like heaps in some ways
<alyssa>
the valhall model i mean
<alyssa>
shrug
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