ChanServ changed the topic of #asahi-re to: Asahi Linux: porting Linux to Apple Silicon macs | Hardware / boot process / firmware interface reverse engineering | WARNING: this channel (only) may contain binary reverse engineering discussion | RE policy: https://alx.sh/re (MANDATORY READ) | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-re
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<amarioguy> hmm been testing s3_4_c15_c10_4 (want to figure out what bits do what), doesn't seem to be doing anything (SYS_IMP_APL_CYC_OVRD does actually seem to disable irqs/fiqs) on t6002 (been poking it with m1n1, trying to raise IRQs to see what happens, but they seem to go off as they normally do)
<amarioguy> (also booting linux with the register changed seems to affect nothing (not sure if linux changes this register back or smth)
<amarioguy> further testing with linux, with core 0 set to accept everything and cores 1-19 opted out of IRQs, doesn't affect anything
<amarioguy> ...okay never mind lol was dumb
<amarioguy> think i almost have this figured out
<amarioguy> yes!! figured it out
<amarioguy> marcan: update on that register - turns out *only* 0x3 will opt out the core
<amarioguy> from my testing seems like BIT(0) or BIT(1) by themselves don't affect this (perhaps they're sort of a prioritization thing?)
<amarioguy> (probably unsurprising result here, but FIQs are totally unaffected by s3_4_c15_c10_4, makes sense as they're part of core complexes directly)
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