00:10 <cphealy> marex: perhaps, I've never tried it. I just have some idea about what wv is doing.

00:10 <cphealy> If that was enough, it should provide a "significant" improvement in performance on the i.MX6 given how taxed the SoC is with 1080p display resolution.

00:11 <marex> I cannot confirm or deny anything

00:54 <cphealy> ;-)

06:31 <tomeu> austriancoder: ah sure, I wasn't saying that because there would be a situation in which we go above the limit, it's just that the blob puts 0x3ff when there are less dimensions

09:33 <tomeu> austriancoder: do you know anything else about VIVS_CL_CONFIG_VALUE_ORDER besides what is already in rnndb?

09:34 <tomeu> I have gone with 0x3, and having global_id in t0, local_id in t1, and group_id in t2

09:34 <tomeu> but if the shader has only local_id, then I read only 0s from t1

09:35 <tomeu> if I change to 0x5 and rearrange the temp registers accordingly, things start working

19:45 <austriancoder> tomeu:

19:45 <austriancoder> tomeu: yes.. I will push a doc update in the next minutes

20:26 <austriancoder> tomeu: https://github.com/etnaviv/etna_viv/commit/23b7be96d64d05bca6b5ab467b75d403dcaffcf5