01:14 <jessica_24> btw ubwc was added in mdss 1.7.0

01:14 <lumag_> jessica_24, thanks!

01:15 <lumag_> Marijn[m], konradybcio, so that means that UBWC starts from 8x96

01:17 <lumag_> so, judging from the rest of mdp5 cfg data, it looks like 8996 is a good branching point for adding support to DPU1.

01:18 <lumag_> then pipe_cursor support can be removed from mdp5 (with maybe more cleanups following that).

01:20 <lumag_> Well, maybe except 8x76, so that we won't have to bring smp support into dpu

22:28 <steev> lumag_: something i noticed i've started getting with 5.16.0-rc6 - https://paste.debian.net/1224685/ - this is (afaik) before the venus module is even probed?

22:29 <lumag_> steev, this is a part of clk_disable_unused part

22:30 <lumag_> It would be interesting to understand why of sudden.

22:30 <lumag_> Did you disable the clk_ignore_unused at some point?

22:30 <lumag_> or pd_ignore_unused?

22:31 <steev> pd_ignore_unused is still in my command line, clk_ignore_unused is not in my command line

22:31 <steev> [ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-5.16.0-rc6 root=UUID=83d75c37-0ba4-4a8e-8e13-996d96bf39b1 ro pd_ignore_unused quiet splash

22:45 <steev> lumag_: i had disabled clk_disable_unused because with the cache clocks patch and the testing of https://github.com/steev/linux/commit/f68822f4d73cdc192d4cc5d7499f9bedecb9e6c6 (at some point i need to rip the gcc bits out of that - it was based on someone else's patch to the ML somewhat recently, but it doesn't seem to change anything

22:46 <steev> maybe the venus clocks aren't complete? maybe somehow the convert to parent data isn't complete? or maybe the test clock isn't actually a test clock?

23:04 <lumag_> steev, I'll check tomorrow on sdm845.

23:26 <steev> no rush, i know it's the holiday seasons

23:32 <robclark> lumag_, Marijn[m]: I seem to recall some device (SoC) specific UBWC configuration needed sometimes.. at least that has been the case on the GPU side

23:39 <robclark> oh.. lumag_ Marijn[m]: oh.. we haven't implemented UBWC on a5xx side on mesa.. which might be why it "works" (ie. if mdp5 ignores that it is UBWC, and mesa does as well, the two issues will cancel each other out ;-))

23:41 <Marijn[m]> robclark: yeah I looked in that direction and it seems that is indeed what is happening here

23:42 <Marijn[m]> So in summary for older socs (does sdm6xx count as before or after 8996?), we should teach minigibm to not blindly hand out ubwc, and probably also teach freedreno to check if a buffer is ubwc before trying to handle it?

23:58 <robclark> hmm, I suppose if mesa is importing a UBWC buffer on a5xx, that is a bug.. we can fix that at least.. I'm less sure about minigbm.. I guess if you don't need to be kms master to query supported plane formats, we could query if the display supports it, but that still doesn't tell you if mesa supports it (or the kernel gpu code has programmed the correct magic UBWC settings)