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<lumag> flamingradian[m], I have been looking onto the IOMMU since that email. Unfortunately, as always happens with msm devices, it's a bit more complicated than I initially expected. Things got complicated because of the 8996 mmu
<flamingradian[m]> ah, so I guess that means the series that I originally sent can be applied as-is?
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<aka_[m]> Marijn: I feel like I'm going to revamp this entire code with regmap update bits and others
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<lumag> flamingradian[m], as we are not in a hurry, let's try finishing the refactoring first.
<flamingradian[m]> lumag: Sorry, I'm confused because there are some replies in the thread which you haven't responded to. One of the emails said, "If the devices are really different, even though it is not visible in Linux driver, then indeed there is no point for fake compatibility." Are we still going to add a generic compat string?
<lumag> flamingradian[m], I'd try to
<flamingradian[m]> lumag: so is there still a reason to add it? Here's the original reply: https://lore.kernel.org/linux-arm-msm/f6c8e1d4-54bd-811c-7322-375f755ad460@linaro.org/
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<lumag> flamingradian[m], yes, I saw that email.
<lumag> For me there is a reason. I'd say, we already have the arm,mmu-500 compat. So we are already declaring that these IOMMUs are somewhat the same story.
<lumag> And adding a separate qcom,mmu-500 seems logical.
<lumag> The idea of having identical compat lines makes me itch.
<flamingradian[m]> lumag: ok, make sure that the quirks still work
<lumag> yep
<Marijn[m]> <aka_[m]> "Marijn: I feel like I'm going to..." <- Be careful with this though, if the reference implementation constructs a local variable and writes the final register value qt once you shouldn't replace that with multiple regmap writes (even though it supports some form of caching/flushing, I'm not sure if it's desirable to use it that way - never seen it)
<Marijn[m]> s/qt/at.
<Marijn[m]> There's also reg_field but it looks even more verbose...
<aka_[m]> <Marijn[m]> "Be careful with this though..." <- i think i can kang clk-pll.c and clk-alpha-pll.c atleast part which touch "user_reg"
<aka_[m]> because here we have "magic"
<aka_[m]> which in reality sets early output
<aka_[m]> names are missleading tho
<aka_[m]> PLL_USER_CTL in clk-hfpll.c is "user_reg"
<aka_[m]> PLL_CONFIG_CTL is "config_reg"
<aka_[m]> im going to rework user_reg because config_reg isn't that much described even in 8916 TRM
<aka_[m]> CONFIG stuff which is written at once can be left, but we need to handle different VCO/rates
<aka_[m]> but only for A53 cluster
<aka_[m]> 652-902Mhz range ships with VCO_BIT set to 0(HIGH VCO range) and config of 0x141400
<aka_[m]> SR2 PLL docs from 8916
<aka_[m]> its wondering why high clock ship with low freq VCO,probably some pll internals about which i know nothing
<aka_[m]> a72 always low freq vco
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