#linux-msm on 2022-08-14 — irc logs at oftc.irclog.whitequark.org

2022-03-22 11:52 ChanServ changed the topic of #linux-msm to:

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10:20 <lumag> aka_[m], regarding the swizzle. Patches are welcome. It well might be that we missed it, while adding support for newer revisions

10:28 <aka_[m]> lumag: i think its quite messy.

10:28 <aka_[m]> swizzle appears to be used when UBWC is active which is something about bandwidth compression right

10:28 <aka_[m]> SM6115 writes static UBWC value in HW_TOP on downstream which i did in mainline hw_top at the end

10:29 <aka_[m]> so work on swizzle/ubwc might be needed when we get high resolution panels where compression will be used.

10:29 <aka_[m]> Not a case on low end chips like sm6115 where DPU appears to be capped at 1080p

10:31 <aka_[m]> and me trying to bring some downstream code which i don't understand is quite dumb idea to waste someone's time xD

10:35 <lumag> aka_[m], nah, ubwc is about compressing textures, not about display compression/resolution

10:36 <aka_[m]> DSC is about display?

10:36 <lumag> yes

10:36 <lumag> Note that UBWC_STATIC& Co are set at the msm_mdss.c

10:36 <aka_[m]> yes

10:36 <aka_[m]> thats where i set default

10:36 <aka_[m]> downstream does it in ubwc_hw_reset in sde_mdss_top or something

10:36 <aka_[m]> but only if UBWC is 2.0

10:37 <aka_[m]> and does some stuff to it if fetch type is different than X

10:37 <lumag> yep

10:37 <lumag> But the config is mostly static

10:38 <aka_[m]> does it reset to some default value once MDSS block is turned off?

10:38 <aka_[m]> it was giving me 0xe after i got screen shutdown after writing with mem_write32

10:40 <aka_[m]> lumag: any comment on that patch from Loic

10:40 <lumag> which one?

10:40 <aka_[m]> https://patches.linaro.org/project/linux-arm-msm/patch/1642586079-12472-1-git-send-email-loic.poulain@linaro.org/

10:41 <aka_[m]> it appears to hit sm6115,not sure how Marijn haven't reported that on his sm6125

10:41 <aka_[m]> it has same PHY

10:41 <aka_[m]> and they had dpu working

10:43 <lumag> aka_[m], basically, that's the question, which we never fully understood. We have DSI working on earlier PHYs without any issues. So, what is causing the issue here.

10:43 <aka_[m]> uh earlier

10:43 <aka_[m]> earlier ones has no byte_intf clock

10:43 <aka_[m]> like 8996/8994/8953/660

10:44 <aka_[m]> its just byte there

10:44 <lumag> 660 has byte_intf

10:45 <lumag> And it is 14nm

10:45 <aka_[m]> oh it has it

10:46 <aka_[m]> maybe it depends on panel

10:46 <lumag> yep

10:46 <lumag> So, before accepting this change, I'd like to understand the causes and the issues.

10:48 <aka_[m]> https://github.com/torvalds/linux/blob/master/drivers/clk/qcom/mmcc-sdm660.c#L2108

10:49 <aka_[m]> hmm

10:49 <aka_[m]> wait a second

10:49 <aka_[m]> i might have good person to test on sdm660 🤠

10:51 <aka_[m]> i hope i can get this lazy slacker to be useful once

10:52 <aka_[m]> <lumag> "So, before accepting this change..." <- in short on sm6115 Redmi 9T smartphone display was just black and nothing on screen

10:53 <aka_[m]> how are these clocks connected to panel itself no idea cuz im some dumb fuck 🤠

11:48 <konradybcio> >uh it appears mmio read when clocks and bus is disabled ends in reboot

11:48 <konradybcio> yes, if you try to access a gated piece of hw you either get 9600005/96000010 or you get a bite and reboot

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11:49 <konradybcio> > <@aka_:matrix.org> Marijn: lumag_ robclark... (full message at https://matrix.org/_matrix/media/r0/download/matrix.org/uwZTlpOtoRSyIQCXOybAlAnB)

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11:51 <konradybcio> <aka_[m]> "it appears to hit sm6115,not..." <- maybe all other socs had some edge cases where FREQ/2 and FREQ correspond to the same power state or something.. or maybe just sheer luck..

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11:53 <aka_[m]> or cmd panels having some lower requirement?

11:54 <konradybcio> idk, there are devices with both cmd and vid panels working

11:54 <konradybcio> even going back to msm8974 and 28nm

11:55 <aka_[m]> uh quick reminder if you havent followed to top,

11:55 <aka_[m]> Byte_intf is quite new clock there

11:55 <aka_[m]> appears to start somewhere around sdm660

11:56 <konradybcio> drivers/clk/qcom/dispcc-sm6350.c... (full message at https://matrix.org/_matrix/media/r0/download/matrix.org/XiQOiUQIjRYnNmJLZEIDPgVH)

11:56 <konradybcio> 660 is the oldest i guess

11:56 <aka_[m]> quite new it looks

11:56 <konradybcio> but we had video mode panels on 10/10+ and cmd panels on xa2 series working

11:56 <konradybcio> perhaps it was just luck, no idea

11:56 <aka_[m]> wait

11:57 <aka_[m]> its only on 14nm phy

11:57 <aka_[m]> for lower its fine

11:57 <aka_[m]> it has to be half rate

11:57 <konradybcio> 660 uses 14nm iirc

11:57 <aka_[m]> 660/2290 only are ones using byte_intf

11:57 <aka_[m]> from 14nm phy

11:58 <aka_[m]> still something must be on the topic if it fixes it on qcm2290/sm6115

11:59 <aka_[m]> quite annyoing we cannot read easily freqs on downstream

11:59 <konradybcio> /sys/kernel/debug/clk/dispcc*/clk_rate?

11:59 <konradybcio> or this https://github.com/andersson/debugcc?

11:59 <aka_[m]> as you might know sometimes rates are just 0

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14:55 <ichernev[m]> aka_: which phones are covered by Luic's patch. He tested on qcm2290, you tested on sm6115. I mean if his code affects other phones we should test on those as well

14:55 <aka_[m]> ichernev: you can try your billie if it won't show stuff without patch then its affected, i might have nergzd try on his clover too

14:56 <aka_[m]> as he had blank screen too

15:00 <ichernev[m]> lumag: other then testing on some devices, do you have something else in mind in terms of "understanding what is going on". I mean his patch more or less states what is going on, question is do you believe downstream code enough :)

15:01 <ichernev[m]> <aka_[m]> "ichernev: you can try your..." <- I'll try to test this in the next few dayd

15:01 <ichernev[m]> s/dayd/days/

15:11 <aka_[m]> <ichernev[m]> "aka_: which phones are covered..." <- not on phones but socs using PHY version <=2... (full message at https://matrix.org/_matrix/media/r0/download/matrix.org/jySzefrlRmUkqGUIBxYQMImY)

15:12 <aka_[m]> from this list we only have 660/662/665 having work done on them

15:12 <ichernev[m]> What about Marijn: he ported 6125, right?

15:13 <ichernev[m]> ah, that is 665, my bad

15:14 <ichernev[m]> lumag: can we mark this as a quirk and have each DT determine whether to div the clock or not?

15:17 <aka_[m]> he said it was fine for him

15:17 <aka_[m]> so is 660 fine for them but not for everyone

15:38 <ichernev[m]> > so is 660 fine for them but not for everyone

15:38 <ichernev[m]> I didn't quite get that

15:42 <aka_[m]> some ppl who tried bring displays on their see blank screens

15:42 <aka_[m]> i cannot recall many more 660 devices with working displays

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