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<Mis012[m]> hmmmm
<Mis012[m]> it may be that it actually changed, but reading it with EL1 returns 0x0
<Mis012[m]> nah
<Mis012[m]> or?
<Mis012[m]> hmmmm
<Mis012[m]> it even reboots when I set it to SWD mode
<Mis012[m]> which would make sense since the downstream code says the SRST signal will get spuriously asserted without precautions
<Mis012[m]> Info : 58 91 adi_v5_swd.c:370 swd_connect_single(): SWD DPIDR 0x5ba02477
<Mis012[m]> uhm
<Mis012[m]> that doesn't look like cortex-a
<Mis012[m]> is RPM cortex-m7 now?
<konradybcio> did you expect a lower power core to be cortex-a? 🤔
<Mis012[m]> I expected the DPIDR to pop up to be the one for the APSS
<Mis012[m]> also RPM should be M3
<Mis012[m]> not M7
<Mis012[m]> what's this error... :/
<Mis012[m]> I see... I've put -ignore-syspwrupack in the wrong command
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<Mis012[m]> it asks me to add a target, but if I do, it gets stuck :/
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<Mis012[m]> also the workaround mentioned in downstream doesn't seem to make any difference :/
<Mis012[m]> which is sad, in case I wanted to at least use the UART...
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<lumag> aka_[m], Marijn[m] could you please help me by verifying the value of one reg on sm6115? 0x05e04a00 = 0x05e01000 + 0x4000 + 0xa00, the scaler version for the SSPP_VIG on that platform?
<lumag> Marijn[m], if you can also check the same reg (modulo MDSS offset) on sm6125 and sm6350, that would be really helpful
<lumag> OFC it's not urgeng
<lumag> urgent