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<apritzel> junari__: did I get this correctly that you work on LPDDR4 U-Boot patches for the H616? Just want to avoid double work ...
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<junari> apritzel: yes
<junari> I plan to do it
<junari> Most likely this weekend
<apritzel> cool, many thanks! Happy to review (and merge!) them then ...
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<junari> apritzel: thanks. I hope this time I won't forget signed-of-by
<junari> Now I have a module with t507 cpu from another manufacturer, not myir
<junari> And it have old version t507 without (-H) but with a working HDMI
<junari> And it has the same RVBAR address as all H616
<junari> Something is rotten in the state of Denmark
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<apritzel> junari: welcome to Allwinner ;-)
<apritzel> tbh, I am not very surprisded, we have seen H616 with the other RVBAR address, so I believe this is just another die variant, used in all SoC versions (H616/H618/T507/...)
<apritzel> maybe even something that is decided at binning time, or set via a fuse
<apritzel> doesn't really matter, the code should be able to detect this, so we don't need to know beforehand
<apritzel> and this "-H" is a recent change just in the naming, to show it supports HDMI
<apritzel> so it looks like your new chip is just from an older batch of T507
<apritzel> so I'd say: the H616 came first, so most of those chips are old die revision. T507 came next, so many still use that old revision too. Then they changed the die, so everything produced afterwards has changed
<apritzel> which affects all SoCs
<apritzel> but that's just a theory ...
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<ItsKaitlyn03> why is allwinner so confusing with their SoC line up lol
<apritzel> ItsKaitlyn03: because then they can offer every customer their tailored product, even if they are all more or less the same
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<smaeul> 2023-06-07 21:27 <apritzel> smaeul: great, thanks! Can you check whether you can change register 0x7010254 from non-secure world (U-Boot or kernel)?
<smaeul> I finally went to check this, but DRAM init fails ("read calibration failed!") on my secure OPi Zero2. Exact same U-Boot (modulo CONFIG_SPL_IMAGE_TYPE) works fine on my non-secure OPi Zero2
<smaeul> I went back to v2022.07 with the same results, so I wonder if the board might be dead
<apritzel> smaeul: mmh, I also have an issue with my OpiZero2 with DRAM: the DRAM init apparently finishes without errors, but afterwards DRAM doesn't work properly, and TF-A (the first real user) hangs
<apritzel> or it could be our infamous H616 DRAM driver compilation issue, which I believe is more something related to the image layout and size than a compiler problem
<smaeul> one difference between the boards is that the secure one is 512M and the non-secure one is 1G. dunno if that helps
<smaeul> I tried applying the workaround from before: 2022-05-31 23:30:47 smaeul gcc 11 works if I mark mctl_phy_read_calibration as noinline
<smaeul> and also your "add a udelay(1); at the beginning and the end of mctl_phy_read_calibration()" workaround
<apritzel> ... which I now think just slightly shake up the code layout (or size?) and thus trigger the bug (or not)
<smaeul> anyway, checking the permissions on 0x7010254 doesn't require functioning DRAM. 0x7010254 _can_ be written from non-secure mode
<smaeul> and it does not depend on the value of SUNXI_R_PRCM_SEC_SWITCH_REG
<apritzel> smaeul: wow, cool, many thanks
<smaeul> 2023-06-19 19:05 <bigunclemax> Hi, can anyone help me clarify the thermal sensor calibration process for T113/D1 SoCs?
<smaeul> The calibration process is the same as H6. BSP and mainline use different, but equivalent, algorithms for converting the ADC value to a temperature
<smaeul> Note that on T113/D1 you also need to calibrate the LDO providing the ADC reference voltage, or the temperature will be way off
<smaeul> my github is way out of date, but these branches have the changes needed to calibrate both the LDO and the THS: https://github.com/smaeul/linux/commits/d1/sid-fixes https://github.com/smaeul/linux/commits/d1/regulator-support https://github.com/smaeul/linux/commits/d1/thermal-support