ChanServ changed the topic of #panfrost to: Panfrost - FLOSS Mali Midgard & Bifrost - Logs https://oftc.irclog.whitequark.org/panfrost - <macc24> i have been here before it was popular
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<daniels> icecream95: sort of yes to both. just just starting on the kernel
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<rasterman> HdkR: ooh .. that has some pretty good cpu cores (for a "dev board"). the gpu is decent too. though i have a g76 to run panfrost on for now so i'm happy, but that above looks pretty nice. it'd make for a pretty good media-player pc for your tv or a casual "daily browse the internet" pc ...
<rasterman> no pricing though that i can find...
<icecream95> HdkR: Seems to be slower than the MT8195 in the newest Valhall chromebooks... I think that can do 3 GHz on the big cores
<daniels> HdkR: gen9? boring :P
<HdkR> Looks like the device is planned to be $439.00
<HdkR> daniels: Need to complain to Mediatek about that one :P
<rasterman> daniels: csf gpu's are easier to find... :)
<rasterman> its the rarity of a valhall in dev board form that is interesting :)
<HdkR> Might need to get one of those just for playing with panvk + fex-emu
<rasterman> :)
<daniels> rasterman: getting easier to find now they're ramping up into production ...
<rasterman> thankfully :)
<daniels> HdkR: $439 is pretty punchy tbh
<rasterman> just has been a struggle for a while.
<daniels> though you usually pay a premium for SoM + carrier board over SBC
<rasterman> and pay a premium for low volumes
<HdkR> daniels: Definitely for some random users. Not too bad compared to something like Jetson Orin :P
<daniels> yeah, but it's ~4x the cost of your average performance SBC
<daniels> *average, performance-competitive, SBC
<HdkR> Sadly
<rasterman> yeah. that's pretty pricey.
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<icecream95> I should probably get back to adding support for CSF to Mesa... the command stream should be pretty simple to emit if I ignore dirty tracking for now
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<alyssa> 1 file changed, 49 insertions(+), 129 deletions(-)
<alyssa> i heard you like deleting things
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<jenneron> if anyone needs working gpu on peach-pit and peach-pi chromebooks, i merged kernel-side patches to postmarketOS, though it's still required to build patched mesa with t620 enabled
<alyssa> jenneron: What's the status of t620 with panfrost on mainline?
<alyssa> [If things work I don't mind enabling it upstream, keeping in mind I don't have and don't want the hardware ;) ]
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<macc24> but i want the hardware ;D
<jenneron> as i've reported before, t620 itself works, but performance on exynos is very poor, this patch is supposed to workaround it https://gitlab.com/postmarketOS/pmaports/-/blob/master/device/testing/linux-postmarketos-exynos5/0037-soc-samsung-pm_domains-Bring-back-old-driver-impleme.patch
<jenneron> i don't have this device anymore, but i've been reported that it scores ~750 in glmark2 and has some issues with xorg
<jenneron> these are letters from the one who tested it https://dpaste.com/DJSJDLRHL and https://dpaste.com/4S4MT6XWW
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<HdkR> Fun, platform driver issues
<alyssa> jenneron: Hum, ok
<alyssa> I guess big shrug on whether to enable upstream
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<icecream95> I wonder if CSF command streams are turing-complete. Even if not, I think useful computation could still be done with them
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<icecream95> Once I get my hands on an RK3588 board, maybe I'll see if I can write a "GPU-accelerated" snake game that uses a command stream for all logic and rendering
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<anarsoul> icecream95: are you getting quartzpro64?
<alyssa> icecream95: the CSF command stream is firmware-defined, right?
<alyssa> and that firmware isn't signature checked, is it?
<alyssa> ;-p
<icecream95> alyssa: Not exactly? I think the top-level command stream could be interpreted by firmware, but the second level which has the actual draw commands is done in hardware, maybe?
<alyssa> ah, yeah, that sounds likely
<alyssa> maybe?
<alyssa> it's my understanding things like indirect draws are done on the MCU, so maybe draws are too
<icecream95> Do we have any idea what the microcontroller clock speed is? Because it would need to be pretty high to interpret the draws, which would maybe take 200 cycles each
<icecream95> (The blob uses at least 17 commands per draw, and each of them would be on the order of ten MCU instructions. Also copying from the constructed draw to less volatile memory would take some time to do with firmware)
<alyssa> Yeah, that's fair. I guess we'll find out in due time.
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<icecream95> alyssa: I'm wondering whether to keep using pan_pack for descriptors that use a command stream. It'd make implementation somewhat easier, but dirty tracking is hard to do except by splitting the structs up in to many smaller ones
<icecream95> Maybe the way to do it is by passing ctx->dirty (or a value derived from it) into the pan_pack macro?
<icecream95> But then the XML would have to depend on implementation details of drivers...
<jenneron> alyssa: xorg issue should probably not block enabling t620 in upstream. i had to blacklist panfrost kernel module anyway, iirc xorg segfaults when it's probed
<jenneron> i should get hardware and test everything again
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<alyssa> icecream95: Without seeing the details of the CSF command stream, it's hard for me to say.
<alyssa> Panfrost's flavour of GenXML is optimized for packing Mali descriptors, IIRC I specifically removed command stream functionality from the intel/v3d upstream when I forked it off.
<alyssa> Maybe you just want to restore that functionality (from v3d's genxml)?
<alyssa> Passing dirty state into GenXML seems like a huge hack that should not be necessary.
<alyssa> Have you published any documentation on the CSF command stream format?
<icecream95> alyssa: I don't remember, but the commands are simple enough:
<icecream95> One byte flags, one byte address, six bytes payload
<alyssa> (It would be useful to have that info in Mesa, I'd be happy to have notes live in panfrost's webspace on mesa3d.org)
<icecream95> Most commands write either four or six bytes into a 256-word buffer
<icecream95> Actual draws are flagged with bits in the flag byte
<icecream95> The buffer holds a shuffled version of the v9 descriptors
<alyssa> Interesting.
<icecream95> (I assume that the buffer actually exists as a linear block of RAM, but I could be wrong)