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<marcan>
sven: you should have branch write access to asahilinux/linux now, only `main` is excluded
<marcan>
bloom: added you too, *hint hint*
<marcan>
kettenis_: let me know if you want access too; I'm fine with the external fork process too, but I think it's helpful to have regulars doing dev directly in upstream repo branches :)
<marcan>
I think for m1n1 we want to keep the PR model (though I might just merge stuff outside of PRs too, it's not required), but we don't need PRs for the kernel as all of that is coordinated with upstream
<marcan>
I want to eventually set up some kind of auto-merge-bot to build `main` out of golden feature branches or something like that
<sven>
marcan: sounds good, will push my stuff later today
<kettenis_>
marcan: might make sense for coordinating work on DT bindings and device tree updates
<kettenis_>
and while on the subject of DT bindings: Linus Walleij is taking my pinctrl binding through the pinctrl tree but the actual device tree changes need to go through some other tree
<sven>
probably through marcan and then through arnd's soc tree i guess
<arnd>
right
<kettenis_>
would make it easier to patch up the interaction with your clock bindings
<kettenis_>
oops
<kettenis_>
meant to say that makes it easier to deal with the clock stuff in the pinctrl nodes
<marcan>
kettenis_: invited :)
<marcan>
kettenis_, sven: I think for the upcoming changes, which are mostly to "small" subsystems, it makes sense to keep a nice merge pipeline going in our tree so we can test everything together and make sure it's cohesive before/while submitting upstream
<marcan>
keep our tree a couple steps ahead of mainline, just enough to validate that the ideas work, and then submit as things fall into place
<marcan>
it's kind of a balance between "wasting" work if things need to be changed after upstream review and blocking on said review; bit of an optimization problem :)
<_jannau_>
<sven>
sure, especially with the clock/DART stuff will will need to work together with almost everything else
<marcan>
yeah
<marcan>
don't want us to move too slowly to get everything super kosher for upstream; the initial bring-up was very hairy with all the arch/ stuff, but it ought to be much easier to do git cleanups for submission for all of these drivers and bindings
<sven>
dart is gonna be a little bit hairy since I'll probably need to change something in the iommu subsystem to allow 4k cpu / 16k iommu pages
<sven>
but the rest should be fine
<marcan>
sure, but that still hopefully doesn't have much impact elsewhere
<sven>
yeah
<sven>
and for the clock I'll have to discuss with the maintainers how to encode the non-leafs in the device tree such that we don't have to have that in the drive
<sven>
r
<marcan>
we should do something like dart/{dev,for-next} pinctrl/{dev,for-next} etc
<sven>
but that won't have an impact anywhere else either
<marcan>
have a dev branch to hack on with impunity, and a for-next for cleaned up series
<sven>
sounds good
<marcan>
also we make zero promises about not force pushing for any of this
<sven>
ofc :D
<marcan>
`main` will also be endlessly rewritten by a bot at some point, I should set up an action for that
<marcan>
and then i'll have a `base` or something which is whatever linus tree base we are currently working off of
* emilazy
definitely welcomes a canonical "asahi linux tree" for testing/packaging/building stuff off of (but then, I currently own no AS hardware, so my opinion probably shouldn't count for much...)
<arnd>
sven: I agree that there should be something in the dart driver to allow booting with 4K pages, but I don't think it's necessary to have isolation in that case for the initial merge. Falling back to a fixed linear map (plus swiotlb if necessary), but having proper iommu support for 16KB pages should give us enough confidence in the binding that we can change the iommu core code for small pages later
<marcan>
sven: have we confirmed that dart can't do 4K pages?
<sven>
yes
<marcan>
sadface
<marcan>
that kind of screws up isolation for distro kernels
<sven>
there's even a field in one of the write-only registers at the beginning that indicates the page shift
<sven>
it's probably hard-wired when they synthesise the hw block :/
<marcan>
read-only you mean?
<sven>
er, yes
<marcan>
sven: maz doesn't think we can mix page sizes btw (other channel)
<sven>
well, even better for me!
<sven>
I mean, it'll kinda boot in bypass-only mode if we can somehow convince pcie to support that
<sven>
dwc3 almost works there. for some reason it ignores dma-ranges though and refuses to use >32 bit addresses
<marcan>
IIRC there's a flag for 32b vs 64b DMA?
<marcan>
I remember something from the ps4 thing
<sven>
maybe, didn't really look into it in much detail
<sven>
just patched some hack in there to force 64bit and then bypass mode worked
<j_ey>
so maybe 'standard' distro kernels can just bypass dart, thats the suggestion sven ?
<sven>
maybe, but we shouldn't enable thunderbolt there then
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<sven>
this also depends on pcie working in bypass mode
<sven>
which may or may not be possible
<sven>
since the last time someone tried I found another bypass bit. maybe that thing helps
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<marcan>
depending on how the GPU does things, we might not be able to get away with bypass mode there
<marcan>
e.g. userspace command buffers
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<sven>
I'm not sure if the gpu is behind a dart
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