ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<marcan> given the API we have I think it'd make sense to just let the IOP decide and invoke either API depending on whether it wants a prealloc buffer or not
<marcan> and then the driver itself can figure out how to handle individual devices
<marcan> e.g. for SMC I pre-ioremap all SRAM and then just validate that any requests from RTKit fall in that range and return a pointer to that offset in the ioremap area
<marcan> DCP would have to check that all prealloc requests fall in the VRAM/DCP/whatever (this is in the ADT somewhere I think) RAM range
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<sven> yeah, just get rid of flags and have a single buffer_request callback that gets that rtk_buffer structure and just fills it however it sees fit and sets a flag for iomem vs. RAM
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<sven> or maybe even just have the flag global since so far we haven’t seen a coproc that mixes iomem and ram buffers
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<sven> marcan: have you done any changed to rtkit when you wrote SMC and already pushed those somewhere?
<sven> *changes
<_jannau_> sven: the oslog support required for dcp is in https://github.com/jannau/linux/tree/bits/050-nvme
<sven> nice!
<sven> looks reasonable to me. i guess DCP doesn't actually use that oslog endpoint to send any messages?
<_jannau_> dcp crashlog suppport is so far only hacks
<_jannau_> I haven't see any
<sven> so what i would do is move struct apple_rtkit_shmem to linux/soc/apple/rtkit.h, add a is_syslog bool in there and then drop rtkit_ops->flags completely
<sven> and just have a single buffer_request and buffer_free callback that takes a pointer to apple_rtkit_shmem
<sven> and then just do whatever is required directly in the driver
<sven> hrm.. does iova_to_phys work with the DART hacks?
<sven> otherwise you may have to fix those first :D
<sven> (and i just remembered that I wanted to write something about those. feel free to remind me this evening ;))
<marcan> sven: not pushed yet, but yes, I have some
<marcan> let me commit & push
<marcan> sven: smc/rtkit-patches
<_jannau_> sven: it seems to work, it gives me a physical address 40MB above the frame buffer and the crashlog is parsed and looks reasonable
<sven> _jannau_: nice, then what I just wrote should be enough to make the crashlog parsing work :-)
<marcan> sven/_jannau_: Feel free to hack up the API however you want, I don't mind rebasing SMC on top
<marcan> the only thing I need is the ability to run the RTKit requested buffers through a check that they are in an allowlist, of some form
<sven> sounds good to me. would be great if we know that whatever API we end up with works for NVME/SMC and DCP before we submit this upstream
<marcan> and also the driver needs to invoke that check itself (since SMC has its own buffer), so whatever way it's done, it should be reusable between RTKit and the driver
<marcan> (right now the driver just calls its own RTKit callback for the check)
<marcan> actually, let me look for something
<marcan> so a few things from ADT that we care about:
<marcan> iop-*-nub.asc-dram-mask is the offset that needs to be ORed with IOVAs to get DVAs
<marcan> (we need a way to pass that via the DT; DCP has a different one on t8103 and t6000)
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<marcan> iop-*-nub.region-base,region-size: that's the whitelist for SMC; it is also used for AOP, ANS (would be good to check how that one interacts? the ANS one is in RAM), and there are some analogous concepts for GPU but no idea how those work
<sven> the ADT also contains all the pre-allocated buffers inside last time i checked
<marcan> DCP does not have one, so we need some other way to whitelist that the crashlog buffer is where it is supposed to be
<sven> erm. s/pre-allocated buffers/pre-mapped crap inside DART or whatever/
<marcan> does it?
<marcan> you mean the segment-ranges stuff?
<sven> it certainly contains the firmware sections
<sven> don't remember how it was called
<marcan> yes, that's the firmware sections one
<marcan> I just wonder if the crashlog buf is in there
<marcan> so for SMC I just pass in SRAM as another reg
<sven> i remember looking for the crashlog buffer but can't remember if I found it
<marcan> maybe we should have a generic mechanism for supporting one or more RTKit/coprocessor memory ranges?
<sven> ANS doesn't need that fwiw, but might make sense for DCP/SMC
<marcan> does ANS get all its buffers from the host?
<sven> yes
<marcan> ANS does have a region specified at least, but it might just be its TZ region then?
<sven> at least all those that matter. it has some pre-mapped craped inside SART but that's just the firmware + stuff inside TZ
<sven> and it never sends those addresses to us
<sven> it's all setup before we get control
<marcan> right
<sven> and for crashlog/syslog/etc. it just asks us for an address. no need to verify anything there
<marcan> I guess security-wise it doesn't make any sense to validate that
<marcan> since we need to trust locked DARTs/DAPFs and such anyway
<marcan> as far as I'm concerned the only thing that matters is that stuff coming *from* IOPs is validated
<marcan> not stuff the bootloader sets up
<sven> we could validate the SART ranges inside m1n1 to ensure they are all inside TZ but meh...
<sven> don't see how that gains us anything
<marcan> that might be a good sanity check to have in m1n1, just for kicks
<marcan> but not necessary for the kernel
<sven> yeah
<marcan> sanity checks are always good to have
<sven> and i know for sure that ANS firmware can't access anything that's not allowed by SART
<marcan> right
<marcan> that reminds me, I wonder if 90 days have passed since that security report...
<marcan> maybe I can disclose now :p
<sven> (and the NVMe DMA crap must be whitelisted inside the NVMMU)
<sven> :D
<marcan> would be nice to engineer a DCP takeover just to validate that it doesn't have any backdoors :)
<sven> this leads to weird situations where apple's special debug commands go through the normal nvme command submission but their buffers must be allowed inside SART because it's the co-processor accessing those and not the NVMe DMA magic
<marcan> though given that I think all .data was writable? I wouldn't be surprised if that's doable without any security flaws involved
<marcan> hah, cute
<sven> for DCP you can even re-map .data using DART to any place you want
<marcan> yeah
<marcan> you'd have to ROP your way in but...
<sven> we might even be able to hack that to recover from panics :D
<marcan> actually I was thinking about that!
<marcan> what if we just snapshot .data
<marcan> and then restore it :)
<marcan> all we need then is a way to shut down the CPU and start it again as if from hibernation
<sven> yeah, DCP does changes a few values when it's in this 0x10 mode though
<sven> and I think it doesn't want to reboot from 0x01 where it just doesn't touch anything inside there
<marcan> yeah but like, snapshot it while it's asleep, wake it up, crash it, figure out how to stop the CPU, restore .data, wake it up again
<sven> yeah, something like that
<sven> there are also functions pointers directly at the beginning of the .data section fwiw, so getting control should be easy
<marcan> yeah but I'm sure it's W^X at least, so you need to ROP it if nothing else
<sven> i never checked where it stores its pagetables :D
<marcan> no ptrauth though
<marcan> ha, good point
<marcan> ... it can't be in the CTRR region so...
<marcan> unless they're in some internal SRAM...
<sven> i wonder if they also lock down the allowed kernel code phys addrs like they do for the main processor though
<marcan> yeah, that might be in there
<sven> but other than that i don't think it's very hard to take over DCP with access to .data
<sven> worst case just build a dumb proxyclient VM using ROP :D
<marcan> ahahahaha
<marcan> make it look like a normal proxyclient object, thank you duck typing
<marcan> and just run stuff on DCP :D
<sven> yup :D
<marcan> tbh though, I don't think there's... actually anything *interesting* to do from DCP? I mean we have access to DISP0 anyway
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<marcan> the only thing I want to know is what its physmem map is, and what it can access
<sven> yeah, i haven't had any good reason to take over any IOP so far
<marcan> yeah, my only reasons are debugging patches and security audits
<sven> yeah
<marcan> they really should just give us a bootpolicy knob to turn all the lockdowns off
<marcan> what's the point once you're running fuOS anyway
<sven> yup
<sven> and they still get to keep the lockdown for SEP for all the security stuff that actually matters
<marcan> of course
<sven> i'd be very happy that locked DART would just go away
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<_jannau_> oh, a keyboard backlight patch for hid-apple on T2 macbooks, not sure if the HID descriptor for the keyboard matches this
<_jannau_> but the report looks like it's the same as the backlight control in applespi
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<povik> the speaker amp chips on macbooks share a reset line
<povik> so there will probably need to be a gpio-hog on that
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<povik> is there a way to make sure the hog is applied before the devices are probed?
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<j`ey> seems a gpio-hog is enabled when the gpio-controller is probed, compared to pinctrl-N stuff which is applied before a device is probed?
<j`ey> take a look at arch/arm64/boot/dts/apple/t8103.dtsi "pcie_pins" for a pinctrl-N example
<povik> looking at that
<povik> can i use that to set a level on a pin?
<povik> can it be shared between devices?
<j`ey> oh hm, maybe a gpio hog is needed to set high/low
<povik> there's bindings/pinctrl/pincfg-node.yaml, which has the options i need, don't know where i can use them though
<povik> maybe i should just try it out
<_jannau_> I think the pinctrl-N bindings are exclusive
<povik> :(
<povik> that doesn't help then
<_jannau_> but I would expect there's something to allow sharing 1 enable pin over multiple nodes
<povik> well i can say the codecs depend on i2c which depends on pinctrl which sets the hogs at probe time
<povik> but i don't particularly like it
<povik> ^ this didn't go in but has discussion of the available approaches
<povik> sorry, that wasn't the root
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<kettenis> povik: what I find odd is that the Linux driver for the tas2770 chip only *asserts* the reset line
<povik> hm?
<povik> > gpiod_set_value_cansleep(tas2770->reset_gpio, 0);
<povik> this is assert
<povik> > gpiod_set_value_cansleep(tas2770->reset_gpio, 1);
<povik> this deassert
<povik> because of how ACTIVE_LOW/ACTIVE_HIGH is declared for this pin, the logic is inverted
<povik> happens in some bindings, i read in rob's post
<jn> shouldn't the driver code work with logical levels, i.e. 0 = not active, deasserted; 1 = active, asserted ?
<j`ey> jn: yeah, that's what povik said ^
<kettenis> it should, but mistakes have been made in the past
<jn> ah, i only read the 'this is assert/deassert' statements, which imply that the driver gets it the wrong way around
<kettenis> povik: ah, looks like I missed that because it is at the very top ;)
<povik> :)
<kettenis> if the order in which the codecs get initialized is predictable, you could get away with only providing the reset gpio for the first one
<povik> yeah, but they don't depend on each other, so there's no ordering
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<kettenis> what happens if you use "shutdown-gpio" instead of "reset-gpio"?
<povik> hm, i don't know what's that about
<povik> there's only one reset-like input on the chip, and that's SDZ
<kettenis> right
<kettenis> and the driver takes sdz_gpio from "shutdown-gpio"
<povik> what is reset_gpio for, then?
<kettenis> good question
<povik> i don't see a cover letter for this, this is where it was added
<povik> (shutdown-gpio)
<povik> reset-gpio has been there since the beginning
<kettenis> I suspect that using shutdown-gpio leads to less power consumption when suspended
<povik> we can even handle it being reset-gpio at the moment :-p
<povik> given there are more codecs
<povik> *can't
<kettenis> with shutdown-gpio the first chip that gets probed would power them all up
<kettenis> or is the problem that gpios are exclusive?
<povik> i meant the problem will be with suspend
<kettenis> first one to suspend will suspend them all yes
<povik> if we ignore that and add SHARED flag to the shutdown gpio, then we can register it with all codecs and the first to probe will power all up
<povik> well if there's no other operation to suspending the codecs that may work too
<kettenis> indeed
<kettenis> that was my thinking
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<povik> seems it would work for suspend too
<povik> i like this
<kettenis> you don't really need the shared think I think
<kettenis> the first one that gets probed will claim the gpio and power the chip on
<povik> that will fail at gpiod_get, no?
<povik> ah right!
<povik> it will fail at gpiod_get, but that will do the right thing
<kettenis> bit of a hack, but maybe good enough to make progress
<povik> the issue will be with resuming, depending on what order they get resumed in
<povik> if the first to resume won't be the one holding shutdown-gpio, the call to regcache_sync will fail
<povik> the SHARED flag approach may work for resume also, but i leave that for another day
<povik> to start i will just add shutdown-gpio= to all
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<alyssa> sven: DISP0 interrupts seem to be routed to DCP instead of the AP, so there's that
<sven> are they only routed there or do we just not know the AP IRQ number for them?
<alyssa> hm, not sure
<alyssa> If it's possible to get a vblank IRQ on the AP that would clean up some hacks in the DCP driver I imagine
<sven> wouldn't surprise me if the IRQs show up somewhere in AIC as well
<sven> the ADT has a bunch of interrupt numbers for disp0 fwiw
<marcan> IIRC there is also some shared memory with a swap number, not sure if that is used for communication between GFX and DCP
<marcan> it's part of the dcpep buffer
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<povik> marcan: give me your ack on adding nco under ARM/APPLE in MAINTAINERS
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<alyssa> povik: Careful what you wish for
<sven> i think it only needs an ack if it's to-be-merged through a different tree
<alyssa> I once said that and just got the Acked-by texted to me.
<sven> :>
<povik> alyssa: yeah, that's what i want
<sven> povik: okay, Acked-by: Sven Peter <sven@svenpeter.dev> :-P
<povik> and the MAINTAINERS commit needs to go through marcan's tree?
<povik> sven: thanks
<sven> it doesn't need to but it apparently makes life of upstream easier during PR time
<povik> or rather marcan/sven's tree IAUI right
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<sven> otherwise we have multiple PRs from multiple subsystems which all conflict in the same section of that MAINTAINERS file
<sven> which isn't a big deal because those conflicts are trivial but we can easily avoid them *shrug*
<povik> right
<alyssa> povik: Acked-by: Hector Martin <marcan@marcan.st>
<alyssa> i'm v useful
<sven> :D
<povik> you hector?
<alyssa> no i'm sven
<sven> 🤨
<j`ey> the bobsledder
<alyssa> no i'm sven the programmer
<alyssa> sven: is the bobsledder
<sven> ah! now it makes sense
<j`ey> alyssa: oh you're the pro gamer
<krbtgt> alyssa: you'd be good for signing cheques in his name
<krbtgt> if you spend his money on macbooks no one would be the wiser
<alyssa> krbtgt: that'd be fraud, I would never
<povik> but acking in other's name you are okay with
<povik> that's more of a fraud to me
<alyssa> yeah, sven, how could you
<sven> 🤨🤨
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<alyssa> sven: Is m1n1 getting nvme support?
<Glanzmann> yes
* alyssa thought the plan was to reserve that for u-boot
<sven> i mainly need it to investigate this weird random write + flush bug
<alyssa> ah
<sven> and i'm still amazed how simple nvme is compared to the horror that is usb
<Glanzmann> alyssa: Marcan also mentioned he wants to be able to chainload m1n1 from m1n1 using NVMe.
<sven> once this all gets more end user friendly / stable / production-ready we'll probably want to add a config.h option (or somthing similar) to strip down m1n1 anyway
<sven> no need to ship the hv and proxyclient to everyone i guess
<j`ey> its still only 600K
<sven> well... i don't want a random person to be able to reboot my machine, connect a usb cable and get full access for once ;)
<j`ey> heh
<j`ey> (out of interest, the HV takes up about 30KB)
<sven> The fonts are quite large iirc
<sven> I mainly thought about “possible attack surface” and less about absolute file size fwiw
<j`ey> usb too
<j`ey> sven: yeah, I realised that after your random person comment :)
<sven> :)
<j`ey> sven: we also need a slimmed down thing for PSCI support
<sven> yeah. I kinda hope we can make that as separate as possible eventually because I’m sure people will want to audit that
<alyssa> sven: the really Apple thing to do is produce tarballs with the preprocessor ran for the #ifdef FULL_M1N1 stuff stripped, and just upload that as the m1n1 source
<sven> :>
<sven> And just with a single “v 1.3.whatever” commit instead of full commit history ofc
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<marcan> 01:10:42 < alyssa> no i'm sven <- I thought you were sven's girlfriend
<sven> uh
<alyssa> marcan: oh right i forgot about that
<j`ey> first sven has heard of this apparently
<marcan> povik: a-b and all that :p
<marcan> I need to get some sleep but I'll catch up on email tomorrow and send it properly
<marcan> j`ey: it isn't actually
<alyssa> j`ey: i mean it means sense that marcan knows about this before sven, i'm marcan's older sister
<sven> 🤨🤨🤨
<j`ey> this family tree is very confusing
<alyssa> sven: sisters before misters
<marcan> j`ey: we live in a strange world
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<marcan> sven: the idea with the proxyclient/hv stuff is that if you have bootargs restriction off and -v in bootargs we'll enable verbose boot and USB proxy (with timeout to normal boot if no enumeration)
<marcan> flipping bootargs restriction requires the same access as installing m1n1, so that is the hard gate
<marcan> then -v is a softer gate you can flip from linux
<marcan> (once we have nvram support)
<marcan> that way we can ship proxyclient to everyone, which can come in handy for debugging
<sven> ah, right. Didn’t even think about bootargs
<povik> i wonder about the limit on sven's confusion meter
<povik> so far we are on three emojis
<marcan> clearly we need to go deeper
<marcan> actually I only saw max 3 when we had ~that~ Signal conversation
<marcan> maybe that *is* the max?
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<povik> alyssa: i am copying your hector's a-b into commit, it better be without typos
<povik> :p
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