ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<janneg>
M3 performance cores come out of reset with 1GHz as CNTFRQ_EL0. I guess I should check the counter resolution and then see which reg write changes that
<janneg>
msr(s3_1_c15_c1_5, 0x3uL) switches CNTFRQ_EL0 to 24 MHz