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<
phire >
The strings also mention AGXUnifiedAddressTranslator
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<
phire >
Is this just another name for GART? Or is there more than one address translator that I can't find
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<
alyssa >
phire: I /think/ that's gart but might be wrong
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<
alyssa >
or, backed by GART anyway
01:33
<
phire >
I found mention of GUAT in the device tree. It the name for four memory carvouts
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<
phire >
three of which are these shared memory regions in sgx
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<
phire >
the other one belongs to admac-sio, which is audio
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<
phire >
I suspect it's just a smaller DART-like thing that only does simple block translations, and enables the AGX firmware to access those shared regions
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<
phire >
but the AGXG13X.kext strings don't support that theory
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<
phire >
Oh, there are more gpu related strings in the actual kernel
02:48
<
phire >
lots of mentions about UAT (IOUAT) which seems to be directly related to how these gfx-shared/gpu-shared/gfx-handoff regions get mapped
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<
sven >
oh… duh. Ofc the actual pagetable code would be inside PPL in the actual kernel
07:29
<
phire >
yeah, makes sense
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<
alyssa >
sven: PPL?
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<
sven >
page protection layer, their kernel-inside-their-kernel running in GL2
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<
sven >
the only code allowed to mess with any pagetables
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<
sven >
the actual DART, SART and NVMMU code is also in there
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<
alyssa >
phire: well it sounds like you're making great progress then =D
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<
phire >
Yeah, progress. Just got to understand how these page tables work and then I can trace them correctly.
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<
phire >
I confirmed that the 0x1500000000 pointers match the range of gpu VAs that I see from userspace
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