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<tomeu> alyssa: can't you move it to your FW? :p
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<shashanks> pq: about EDIDlib, its still WIP, I was distracted into a few other things. Will update sometime soon (probably within a week or two)
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<pq> shashanks, ok, thanks!
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<sravn> mripard: reviewed a few of your patches yesterday, but not the ones you asked for I'm afraid. Will take another look after work today
<mripard> sravn: thanks anyway :) I'm glad you did review those ones too
<mripard> let me know if you need me to review something
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<sravn> mripard: Ohh, that would require that I had time to write code myself. Maybe in a few months. Moving to an older house consumes a lot of hobby time :-)
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<bnieuwenhuizen> jekstrand: pipeline building is not interesting for me since I've seen how you're doing it already :P the CL stuff is doable but I'd go in with near zero prep-work. Been mostly postponing it until there is code so we have an idea on the how & what that is better than just "implement CL"
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<zmike> mareko: you may be interested in checking this out https://gitlab.freedesktop.org/mesa/piglit/-/issues/57
<karolherbst> mhh, what should I do when drm-misc-fixes isn't updated yet with stuff from 5.14?
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<austriancoder> I would like to push a new tag to https://gitlab.freedesktop.org/gfx-ci/linux .. but "remote: You are not allowed to push code to this project." - who can give me the needed rights?
<jekstrand> bnieuwenhuizen: Fair. Maybe I can get dj-death to post something this week so you have something to read
<jekstrand> bnieuwenhuizen: Not really sure what's been holding that up, honestly.
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<daniels> austriancoder: *waves magic wand*
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<austriancoder> daniels: wonderful.. I just want to add some etnaviv mmu patches
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<zmike> dcbaker: any chance https://github.com/mesonbuild/meson/issues/9251 is a simple fix?
<dcbaker> zmike: yeah, that should be a one liner
<zmike> cool
<karolherbst> mlankhorst, mripard: what's the process if drm-misc is out of date for applying some patches? I have some stuff depending on rc7 or newer
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<karolherbst> jenatali: why is CL so broken? :(
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<karolherbst> the more I look into it the more broken it looks
<karolherbst> CL_MEM_USE_HOST_PTR is just so... ughghuhguhg
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<shfil> has someone some time to check 3 short MRs? iris, gallium and vdpau. I've messed my fork and I think that creating new one gonna be easiest
<jenatali> karolherbst: Yup
<jenatali> It's... not a great API
<karolherbst> jenatali: I just implemented against llvmpipe and everything was great
<karolherbst> now I tested with iris and.. page alignment.. *sigh*
<karolherbst> and clover just falls back to a shadow buffer once it fails to allocate a bo from user memory
<karolherbst> argh
<karolherbst> this is just so broken
<karolherbst> why...
<jenatali> Yeah, Windows doesn't generally allow CPU heap-allocated pages to be sent to the GPU
<jenatali> So we have to use shadow allocations
<karolherbst> and here I was thinking: let's try without those silly fallback paths which are just entirely broken
<karolherbst> well
<karolherbst> for SVM I guess it would still work? dunno
<karolherbst> argh
<jenatali> Probably better to just use the "fallback" paths to start with, and then you can add straight mapping as an optimization
<jenatali> At least, that's my approach
<karolherbst> jenatali: yeah... I think shadow allocations + SVM is not implementable
<jenatali> Sure, but like I was implying, I can't implement that anyway
<karolherbst> as you can map the same SVM alloc into a kernel as a SVM pointer _and_ a buffer
<karolherbst> happy coding
<karolherbst> ahh
<karolherbst> lucky you
<karolherbst> at least bufferreadwriterect runs on the CPU now :D
<karolherbst> uhh...
<karolherbst> btw.. thinking about doing a OpenCL in Rust lightning talk :D
<karolherbst> is this still possible even
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<Peste_Bubonica> hi folks. The AMD SAM will be enabled by default on mesa, with radeon 5000 series?
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<Kayden> the mesa radeonsi driver does support smart access memory (SAM), and uses it if the kernel reports that ~all of VRAM is visible from the CPU
<Kayden> I am unfamiliar with the amdgpu kernel driver enough to know exactly which platforms support it
<imirkin> Kayden: radeon 5000 series isn't covered by radeonsi (or amdgpu)
<imirkin> 5000 series = NI, I think?
<Kayden> was thinking he meant rx 5000, which would be
<imirkin> oh
<imirkin> yes.
<Kayden> AMD's sadly started reusing numbers again :/
<Kayden> (unlike intel, which calls all products 3000) :)
<imirkin> i suspect nvidia will get there too, soon
<imirkin> they've wrapped around at 1000
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<Kayden> mareko, zmike: any thoughts on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623#note_1054747 ? If we need to export a suballocated buffer, we try and reallocate it on the fly, in place. but if it happens to be mapped, I can't see how that could possibly work
<Kayden> unless we just disallow dmabuf export of mapped buffers...
<imirkin> afaik... that.
<imirkin> or rather, you only sub-allocate non-exportable buffers
<Kayden> radeonsi suballocates exportable buffers
<imirkin> ah
<bnieuwenhuizen> buffers or only textures?
<Kayden> textures
<Kayden> oh
<Kayden> right, apps can't map textures
<bnieuwenhuizen> for textures we always do a copy for map, to keep them in the most GPU friendly memory possible
<imirkin> Kayden: except INTEL_map_texture of course ;)
<imirkin> who thought *THAT* was a good idea...
* Kayden wishes people would stop trying to push that
<bnieuwenhuizen> can always do the copy to non-suballocated the first time that extension gets used on the texture
<imirkin> does iris support it?
<Kayden> not that I am aware of.
<imirkin> good.
<Kayden> so I guess we're hoping that whatever the export APIs are, they don't let you get at random buffer resources, just textures/images
<Kayden> and those cannot be mapped by the application
<zmike> Kayden: replied on ticket
<zmike> tl;dr zink can't do it so it's a non-question for me
<Kayden> ah, great
<Kayden> Piglit's bin/ext_image_dma_buf_import-export-tex -auto hits this for me, I have to reallocate it on the fly
<zmike> I haven't focused too much on the piglit dmabuf tests tbh
<Kayden> it's the only one in the whole test suite that hits this case
<Kayden> any of the test suites
<zmike> ah yea I just crash on that one anyway
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<Kayden> it's especially gnarly because we don't even get a context to do copies in, so we have to make a pipe_context at screen creation time for doing such things when dri doesn't give us one
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<zmike> sounds gross
<Kayden> which I probably need to add locking for ...
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<Kayden> pzanoni: wrote up an answer about why mapping shouldn't be a problem for realloc_inplace on the ticket - https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623#note_1059403
<Kayden> thanks for the help everyone :)
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<pzanoni> Kayden: does that mean we can add the "assert(!map)" thing? or perhaps force a munmap before changing?
<Kayden> I don't think we can assert that there isn't a map pointer. The old BO might have been (temporarily) mapped for say a texture_subdata() call. In that case, old_res->bo.map will still exist (even if nobody else is holding on to a copy of that pointer)
<Kayden> and new_res->bo.map might exist because we're allocating a BO from the cache, and it might have had a cached mapping
<Kayden> but I think this is OK as is
<Kayden> because we override suballoced_res->bo = new_real_res->bo, so it inherits the map there
<Kayden> and we assign old_bo to new_res->bo, so when we free new_res, it'll munmap the old one
<Kayden> (we are just swapping the two BOs, with their maps intact)
<Kayden> (and the resources don't have maps, their BOs have maps)
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<bnieuwenhuizen> were there IRC channels planned for XDC like last time?
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<Kayden> oh shoot, that's...this Wednesday o.O
<bnieuwenhuizen> and thu/fri too :)
<alyssa> Kayden: i guess i'm doing a live presentation
<alyssa> because i meant to prerecord and that.. didn't happen
<bnieuwenhuizen> always nice to come back from vacation and get a week with 2 conferences and a (partial)official holiday :P
<Sachiel> did you do your slides or will you do them live too?
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<alyssa> Sachiel: my slides are mostly emojis
<alyssa> alyssa@sunset:~/XDC2021$ ls *.jpg | wc -l
<alyssa> 10
<agd5f> Peste_Bubonica, the kernel driver always resizes the BAR if it can regardless of the GPU. So you get some advantages anyways regardless of what mesa does
<bnieuwenhuizen> are you confident enough to present from your Apple device? :)
<alyssa> bnieuwenhuizen: shit I still need to buy a webcam for that.
<alyssa> I mean. Yes. Totes.
<alyssa> Whatever I bought an audio interface the morning of my XDC talk last year, I'm fine
<Sachiel> embrace the future, emoji for slides, now go vtuber instead of webcam
<alyssa> Sachiel: but what about that cape and wand I expensed two years ago
<Sachiel> I guess you have a point
<Kayden> why have I not thought to expense a cape
<Sachiel> get one as part of the covid budget. Get a plague doctor mask too
<Kayden> "things required for working from home" >.>
<alyssa> i'm still thinking of dropping in Wicked references in my slides
<alyssa> but I'm Not That Girl
<alyssa> actually i totally am that girl. :_p
* Kayden still isn't quite sure what to do about XDC being in the middle of the exact hours he sleeps
<Kayden> some awesome looking talks this year
<bnieuwenhuizen> Kayden: might actually be less overlapping than you'd expect as I think the talks only start at 1 PM local time. Still going to be 4 AM though :|
<bnieuwenhuizen> (assuming west coast)
<alyssa> bnieuwenhuizen: Please recall Kayden's sleep schedule :-p
<Kayden> yeah if it started Poland morning time I'd just stay up late, hahah
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<karolherbst> alyssa: good :D
<alyssa> karolherbst: what can i say? this m1 stuff is making me Popular
<karolherbst> alyssa: memes and emojis is the only way to coop with it
<karolherbst> I hope I won't miss the dedaline for registering my rust talk :O
<karolherbst> don't have more than for a lightning talk anyway
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<alyssa> :)
<alyssa> i should probably stop with the puns for the night because this homework is staring sadly at me
<alyssa> though i can't promise i'm stopping For Good
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<karolherbst> at this point I would only give "bad" advises
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<karolherbst> or is it "give bad advice" actually?
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<alyssa> meh
<alyssa> I'm through with playing by the rules of someone else's game 🤷
<karolherbst> the only sane conlcusion
<karolherbst> *conclusion
<karolherbst> quite saddening we can't have an in person XDC this year :(
<karolherbst> I am still optimistic about FOSDEM though
<alyssa> I like in person but I detest flying so 🤷
<alyssa> I'm good for in-person confs in the GTA or Montreal, but that's about it for me I think 😋
<karolherbst> mhhh.. sad and here I was thinking I'll skip those oversee ones because long distance flights and stuff, but now you are saying this
<jenatali> I would take an excuse for MSFT to send me overseas :)
<alyssa> karolherbst: there's no sustainable way for NA-based and EU-based developers to meet up casually for a conference
<bnieuwenhuizen> well with the restrictions on EU->US air traveling still ongoing I think it is very hard to organize something
<bnieuwenhuizen> and no idea either when they cancel that
<karolherbst> alyssa: not right now at least
<dcbaker> Given the US respsonse to every attempt to manage the pandemic... never
<alyssa> (sustainable, on climate grounds, not covid)
* dcbaker says as an American
<jenatali> Yep
<alyssa> dcbaker: I'm sorry for your loss
<airlied> Kayden: I usually just watch them on youtube live stream time delayed
<airlied> and restrain my impulse to try and respond in real time :-P
<karolherbst> alyssa: there are already test planes on hydrogen basis, so I kind of put my hopes in that :)
<alyssa> airlied: speaking of responding in real time -- I'd really like to have a few folks live on jitsi (IIRC?) for my talk
* airlied has no idea what XDC timezone I'm in this year
<alyssa> given it's a bit more ... "fun" ... than my usual dry technical stuff it might be nice to be able to 'read the room' so to speak
* airlied has to do a midnight->4AM kernel summit in a week or two
<karolherbst> alyssa: ohh.. maybe I should join the jitsi this year
<alyssa> well. for as much as I can read any rooms given my, well, you know 😋
<karolherbst> alyssa: you are giving dry technical presentations? :O
<airlied> okay warsaw 1pm is 9pm my time which is technically my bed time :-P
<alyssa> karolherbst: not XDC
<karolherbst> airlied: we all know that's not true :P
<karolherbst> or.. is it?
<alyssa> airlied: I always forget that australia exists 🙃
<airlied> karolherbst: no by bedtime is pretty fixed, it's what time I wake up again that moves a lot :-P
<karolherbst> I am always surprised when airlied is around
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<karolherbst> "okay it's 3 am for airlied, did he just wake up or wasn't sleeping yet"
<karolherbst> airlied: okay :D
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<airlied> I guess I'll be mostly watching the XDC livestream on delay which is fine, because it looks like a great set of talks
<Kayden> yeah! :)
<karolherbst> alyssa: same for me but on twitter and with austria. Oh that person is actually Austrian... right.. that exists as well
<airlied> someone ask the lvl0 when they are going to make it a real standard :-P
<karolherbst> airlied: mhhhh
<karolherbst> not sure if that would trigger me enough or not
<karolherbst> but I guess you'd just implement it on top of vulkan? :D
<airlied> it has certain incompatiblities with vulkan around fencing and shader model
<airlied> and of course host ptr :-P
<karolherbst> mhhhhh
<karolherbst> my favourite feature
<karolherbst> always has been
<karolherbst> airlied: wasn't the idea to kind of have a vulkan+lvl0 impl in one lib or so?
<karolherbst> but .. maybe we should just implement lvl0 on top of gallium :D
<karolherbst> dunno
<karolherbst> don't care as long as it's not really used
<airlied> karolherbst: one idea, of many :-P
<airlied> nah lv0 can't be done on gallium
<airlied> its at the vulkan level, its just whether you do it on top of vulkan or alongside
<karolherbst> ahh
<bnieuwenhuizen> isn't kind of the point of supporting it multi-vendor is that we finally get something that can move forware as a single target?
<bnieuwenhuizen> vs using 1 API per vendor for each program
<airlied> and that's just the cmd submission side, there's also the mgmt side
<Kayden> if it's actually multi-vendor......
<airlied> bnieuwenhuizen: yeah the trick is making the spec multi-vendor
<airlied> which might be possible outside Khronos but I'm not sure I can see it happening
<bnieuwenhuizen> yeah that is the part where you get to ask the real spec question :P
<Kayden> yeah the Khronos IP framework is really useful for specs like that
<karolherbst> airlied: yeah.. so lvl0 stays intel only
<airlied> karolherbst: well that's the question to ask
<bnieuwenhuizen> though isn't the app-facing part of the Intel stuff mostly SYCL?
<karolherbst> and I am kind of not in the mood to make that successfull just because intel doesn't want to ¯\_(ツ)_/¯
<airlied> bnieuwenhuizen: yeah it would be nice to have SYCL for everyone on the same stack though
<airlied> so we don't need 4 llvm forks
<bnieuwenhuizen> could always make another one
<karolherbst> I'd be happy with only 2 for now
<karolherbst> SYCL is also something I don't really get.. so it's mostly header only on top of CL but then every vendor have their own versions of those headers?!?
<airlied> karolherbst: it's not on top of CL though
<karolherbst> well you can
<airlied> that's just an option
<airlied> it's a long way from just a header
<airlied> it's a complete compiler
<karolherbst> I see
<airlied> you have a single source C++ file
<airlied> that the compiler splits into host and device pieces
<airlied> and compiles them with the host and device compiler
<karolherbst> sure, I just was under the impression it was doing some weirdo template magic to split it out
<airlied> and then you get SPIR-V in your ELF binary
<airlied> CL only comes into play for runtime execution
<airlied> of that ELF binary
<jenatali> The device bits are C++ for OpenCL at that point, which has its own different set of quirks from OpenCL C
<airlied> C++ for OpenCL is actually a different fork
<airlied> it lets you use C++ in OpenCL programs
<airlied> SYCL is single source
<airlied> C++ for CL isn't
<jenatali> Right, I just meant that the way it accesses CL built-ins is different than CL C, instead of just calling well-named functions
<airlied> and SYCL underneath the compiler parses into LLVM IR and translates to SPIR-V, there isn't a C++ for CL intermediate
<karolherbst> SYCL is just using C++ templates for doing the... language bits.. I still don't know if that was a good idea
<karolherbst> the SYCL source files I saw were... ugly to put it midly
<karolherbst> *mildly
<airlied> karolherbst: it's C++, ugly is a very personal opinion
<airlied> all C++ is ugly to me :-P
<jenatali> FWIW Mesa's SPIR-V parser doesn't like SYCL SPIR-V
<karolherbst> jenatali: what's the problem?
<airlied> jenatali: I fixed up parts of it before, but never got back to it
<karolherbst> funciton names?
<jenatali> The SPIR-V is slightly incorrect, it uses the wrong memory modes for built-ins IIRC
<karolherbst> uhhhh
<karolherbst> *sigh*
<airlied> the problem with Intel DPC++/SYCL is it relies on some new SVM exts etc
<jenatali> Yeah
<airlied> because CL SVM is crap
<karolherbst> if all those specs would be written in the same body and they well could talk with each other and make sure stuff like that doesn't happen
<karolherbst> jenatali: shouldn't be tooo hard to fix though... I hope
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<jenatali> Yeah maybe
<karolherbst> airlied: what's specifically crap about it? not enough control?
<jenatali> Someone from Intel managed to get a DPC++ program to work on CLOn12 by hacking around that
<airlied> storage class in SPIR-V has been messy all over
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<airlied> the overview has reasonaing, I asked them to add
<airlied> it would be nice to eventually have a baseline way to run a x86/SPIRV elf binary on all vendors, I'll keep dreaming :-P
<karolherbst> okay .. non system SVM sucks, that much was knwon
<karolherbst> *known
<karolherbst> but yeah..
<karolherbst> guess it makes sense
<karolherbst> airlied: yeah.................
<karolherbst> openmp generating spirv would also have been so nice, but oh well...
<karolherbst> I guess the industry isn't in for that yet
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<alyssa> oh, man, true
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<Kayden> alyssa: so you'd rather make i965 not call lower_blend_equation_advanced for non-FS, and make the pass assert that it's only called for FS, rather than just making the pass become a no-op?
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<Kayden> I think we have other passes that are no-ops, so either way seemed reasonable to me
<karolherbst> jenatali: do you konw if the spec is explicit enough about synchronizing shadow buffers? I'd assume that you can keep data on the GPU until the cl_mem object gets mapped, right?
<alyssa> Kayden: yes, well
<alyssa> mostly I'm of the opinion that whatever st/mesa does is the ABI for glsl+gallium
<jenatali> karolherbst: Yep
* Kayden shrugs
<alyssa> given that i965 is on the chopping block anyway i'd rather not change common for the sake of it
<jenatali> It's exactly equivalent to not using a host ptr, except that you have to return the pointer that the app provided, and it has to contain the contents, but otherwise all the semantics are the same
<karolherbst> jenatali: okay.. then it's not _that_ bad.. but is a bit weird if you do non blocking maps
<alyssa> (when are we deleting i965 btw? is there any regression compared to iris+crocus?)
<imirkin> alyssa: tons
<imirkin> it's nowhere close
<FLHerne> Really? I've been using iris for a couple of weeks now and pretty much not noticed
<imirkin> vs crocus
<imirkin> iris is fine.
<imirkin> it's actively developed and supported by intel staff.
<FLHerne> er, sorry, I mean crocus
<FLHerne> this is an ivb
<imirkin> FLHerne: yeah, i mean it does _mostly_ work
<FLHerne> Presumably the old gens are worse?
<imirkin> there are hangs, esp on older gens yea
<imirkin> snb can't even complete a CTS run without hanging
<jenatali> karolherbst: I can point you to code if you want, but yeah I was passing the CTS with shadows for all USE_HOST_PTR stuff
<imirkin> bunch of bugs in the tracker about GM45 and such having issues
<FLHerne> The only GPU-related issue I noticed was a weird thing where Google Maps in Firefox never releases memory and OOMs
<FLHerne> I could reproduce that intermittently on crocus but never on i965
<FLHerne> but not reliably enough to seem worth filing a bug
<karolherbst> jenatali: well... the more I look into implementing CL in rust the less I trust the CTS :D
<jenatali> karolherbst: It's... pretty good
<jenatali> But also has some big holes
<karolherbst> it lacks tons of negative tests
<jenatali> Yeah, and positive tests :P
<karolherbst> so you could essentially remove most error handling and still be fine :D
<jenatali> And combinatorics
<karolherbst> but yeah.. it's good enough
<karolherbst> but I think I know what to change to USE_HOST_PTR
<jenatali> karolherbst: https://github.com/KhronosGroup/OpenCL-CTS/issues/1208 this one was rough...
<karolherbst> I just already have my worker thread implemented
<karolherbst> jenatali: uhhh
<karolherbst> jenatali: "Pass 1137 Fails 1035 Crashes 6 Timeouts 0" and I can't compile kernels yet ¯\_(ツ)_/¯
<jenatali> Wow
<jenatali> That's impressive
<karolherbst> yeah.. most is due to " is this a CL 1.1 or higher device" checks
<jenatali> :P
<karolherbst> and conversation passing for doubles and longs if you dont' support it
<karolherbst> *conversions
<Kayden> that sounds like the ES2 CTS
<karolherbst> soo...
<Kayden> we had a bug where instead of drawing a red -> green gradient, it just drew solid yellow for everything
<karolherbst> lol
<Kayden> and that passed well over half the CTS
<karolherbst> pass rate 90%?
<Kayden> I forget the exact numbers, but yeah, maybe 80% or something
<Kayden> it turned out draw black passed 80% of the CTS
<alyssa> imirkin: aw, alright
<karolherbst> jenatali: but I do pass quite a lot of real tests :D
<karolherbst> like a bunch of the API ones
<karolherbst> compiler bits will be .. interesting
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<karolherbst> especially the binding generation stuff
<karolherbst> and potentially using an llvm binding crate or so
<alyssa> imirkin: aw, alright
<alyssa> oops
<alyssa> Kayden: asahi is at >95% gles conformance and i doubt it can run weston without bugs 🤷
<jenatali> karolherbst: The issue I linked you is the reason we didn't work with Luxmark 3 btw, once that was fixed it started working
<karolherbst> oh wow
<alyssa> gles2
<Kayden> anholt_: repushed https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12839 with alyssa's feedback, we now make i965 skip the pass and make glsl assert. presumably those both get your R-b still? :)
* Kayden is rerunning CI _just in case_ but it seems to work
<karolherbst> jenatali: I am still unsure where I want to go with this project though :D atm it's mostly just learning rust and figuring out how to use it with mesa still :D
<jenatali> karolherbst: Yeah, seems useful even if it's not productized
<karolherbst> I actually want to submit an MR at some point, but there are some meson bits which we will have to figure out before that anyway
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<jenatali> I've been having fun in my EGL/GLES corner, but getting annoyed I can't say anything about why
<karolherbst> :D
<karolherbst> well, there needs EGL support if windows wants to become a linux desktop environment :P
<jenatali> I got GLES3 piglit tests running (passing) on Windows :D
<karolherbst> yay
<Peste_Bubonica> agd5f, I've noted that the new Windows Driver 21.9.1 officialy supports AMD SAM for 5000 series. Now i'm wondering if it will be enabled by default on mesa too. I already tested it forcing it on (RADV_PERFTEST=sam) with vulkan. But I got very weird results. Some games with a performance hit fo 35%.
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<airlied> imirkin: think I fixed everything except SNB in the tracker
<airlied> imirkin: the remaining ones mostly seem to be it dies with 965 to
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<airlied> or new workloads due to nine
<Peste_Bubonica> oops
<Peste_Bubonica> a kernel crash with amd sam enabled (above 4g decoding and resizable bar)
<Peste_Bubonica> http://0x0.st/-xto.txt
<airlied> imirkin: I suppose I should dig further into the SNB one again, I'm expecting it really needs a simulator to work out why it dies though
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