ChanServ changed the topic of #dri-devel to: <ajax> nothing involved with X should ever be unable to find a bar
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<mripard> jstultz: I know that you tested it and fixed a few bugs, so you must be ok with it, but could you give your a-b or r-b for https://lore.kernel.org/all/20211025151536.1048186-21-maxime@cerno.tech/
<mripard> dim wont let me push otherwise
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<mslusarz> karolherbst: definitely not me and I don't know who started it
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<karolherbst> mslusarz: huh...
<karolherbst> strange
<karolherbst> then I have no idea who it can be
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<karolherbst> all I know is that the first commit is from poland according to the reverse DNS lookup address
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<j0> Is VK_KHR_synchronization2 supported by radv? The extension is not present on my Vega 10 GPU
<pendingchaos> not yet
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<j0> thanks
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<jekstrand> alyssa, bnieuwenhuizen, other NIR types: Any opinions on how we should represent a store_global that we want do do a write, even if it's in a helper invocation?
<jekstrand> pendingchaos, anholt: ^^
<jekstrand> We need it for VK_KHR_ray_query because the way we communicate with the ray-tracing HW is via global memory writes and the ones to set up the query need to happen even in helpers.
<emersion> danvet: i'm wondering how to add IGT for this https://patchwork.freedesktop.org/series/95938/
<jekstrand> I'm contemplating adding an ACCESS_* flag for it. Not sure if I think that's a total hack or not.
<dj-death> jekstrand: another index on the intrinsic?
<dj-death> ah yeah access would be nicer I guess
<jekstrand> Access would be the least invasive option
<jekstrand> I'm just not sure what we'd want to call the flag or what we'd want its semantics to be
<jekstrand> If we did add an access flag, I'd want nir_lower_io to mark scratch that way too
<jekstrand> I'm just not sure what we'd name it and if the flag should mean "write regardless of helpers" or if it should mean "disable in helper invocations".
<pendingchaos> I think an access flag sounds fine to me
<pendingchaos> ACCESS_INCLUDE_HELPERS?
<pendingchaos> another index sounds like more effort
<dj-death> yep
<jekstrand> ACCESS_INCLUDE_HELPERS or ACCESS_DISABLE_IN_HELPERS?
<jekstrand> I think we could go either way without causing a problem.
<jekstrand> It's just a bit of typeing in glsl_to_nir and spirv_to_nir to add `DISABLE_IN_HELPERS` whenever we're in a fragment shader.
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<jekstrand> ACCESS_EXCLUDE_HELPERS?
<cmarcelo> jekstrand: why default the "include helpers" behavior and not the other way around?
<jekstrand> cmarcelo: disabling for helpers feels like the exceptional case to me
<jekstrand> For one, it only applies to fragment shaders
<jekstrand> it's also the one that requires additional work in the back-end
<jekstrand> But I could probably be convinced to go the other way
<karolherbst> okay... I think I need a complete other approach for automating those annoying things with MRs...
<dj-death> jekstrand: kind of curious about why you mentioned scratch
<dj-death> oh... we would just plumb it into SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK
<jekstrand> dj-death: We currently special-case load/store_scratch in brw_fs_nir.cpp to not do the predicate
<jekstrand> dj-death: Yup
<dj-death> we could assert on it and that would give use some coverage of the NIR lowering :)
<dj-death> s/use/us/
<jekstrand> it would
<karolherbst> daniels: are you familiar with gitlab bots?
<karolherbst> kind of search for something you can instruct to do things, like "@bot sob" and it would start adding tags to the commits or something..
<karolherbst> or maybe we should really just script it with dim :/
<karolherbst> dim annotate-mr ...
<karolherbst> and it would just fetch the commits, add tags and repush
<karolherbst> and then use marge-bot without touching the commits at all
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<karolherbst> danvet, airlied: any opinions on that? I kind of come to the conclusion, that bots can't really do what we need, because you can't know what tags you need to remove once marge fails and you retry (e.g. a different person retries)
<karolherbst> so I am thinking about something more explicit
<daniels> karolherbst: each mention will generate a to-do entry https://docs.gitlab.com/ee/api/todos.html
<karolherbst> and we can check everything is in order inside CI itself
<daniels> if you something more pre-rolled, then no I don't know of anything off the top of my head I'm afraid
<karolherbst> daniels: mhh.. annoying
<karolherbst> I just want something which adds Link: and sob: tags :D
<karolherbst> without being a major pain
<karolherbst> what I was able to come up with works as long as CI never fails after assigning to marge
<karolherbst> tag handling inside marge is... painful
<karolherbst> and you always have the issue of not knowing if a sob tag was added by marge or was there from the beginning
<jekstrand> karolherbst: ? I didn't think marge added sobs
<karolherbst> mhhh.. maybe I could convince marge to repush the old commits...
<karolherbst> jekstrand: I hacked it up
<jekstrand> for kernel stuff?
<karolherbst> yeah
<karolherbst> adding sob tags from the person assigning to marge
<karolherbst> :D
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<jekstrand> ah
<karolherbst> but this had implications I wasn't aware of before
<karolherbst> I think if marge would start pushing the old commits it could work
<karolherbst> as long as marge doesn't have to rerun on commits already touched it could work
<karolherbst> but slowly I think that just hacking stuff up inside dim is maybe the better solution here
<karolherbst> and just use the gitlab API within dim
<karolherbst> you already have a kernel tree forked when using dim.. so..
<karolherbst> and probably already have your auth token set up
<karolherbst> or ssh stuff
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<zmike> what's the difference between sint and sscaled?
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<zmike> ah nvm
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<alyssa> jekstrand: ACCESS is fine with me, I think
<alyssa> IIRC on midgard I typed out a "wrap stores with if's" NIR pass
<alyssa> on Bifrost I guess it wasn't needed....? or maybe Bifrost is broken here, dunno how thorough deqp-gles31 is
<anholt> jekstrand: ACCESS_INCLUDE_HELPERS sounds reasonable to me
<dj-death> jekstrand: I didn't realize that load/store_scratch don't have an access index
<jekstrand> dj-death: They don't? I guess that sort-of makes sense....
<dj-death> yeah
<dj-death> don't really see a reason to add it, if we're not going to need to lower it
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<jekstrand> ugh... access qualifiers in vtn are a mess...
<jekstrand> We do all this work to propagate access qualifiers down pointers and then.... ignore them in OpLoad/OpStore. :-/
* jekstrand is very confused
<karolherbst> don't we propagate them to nir at some point?
<jekstrand> In NIR, they're on variables and individual load/store intrinsics
<dj-death> if it makes you feel any better, the rayquery stuff is going through its own set of intrinsics
<karolherbst> jekstrand: ohh..
<jenatali> jekstrand: I definitely remember making changes here at one point
<jenatali> I thought they did get propagated to load/store
<jenatali> Oh, maybe I'm thinking of alignment, not access...
<jekstrand> alignment goes on derefs these days
<jenatali> Ah, right, then maybe I'm thinking of my first attempt at alignment where I'd put it on loads/stores :)
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<alyssa> jenatali: speaking of, do any of the APIs allow unaligned access?
<alyssa> if so AGX will be a whole pile of "fun"
<jenatali> alyssa: CL does for sure
<alyssa> F
<karolherbst> jenatali: really?
<alyssa> (AGX loads/stores are in elements, not bytes [ecept for 8-bit loads/stores]..)
<jenatali> karolherbst: Yeah
<jenatali> You can have packed structs
<karolherbst> like being defined?
<karolherbst> ehh well...
<karolherbst> but the struct itself is aligned
<jenatali> Not necessarily
<karolherbst> if it's in a packed one.. right
<jenatali> But yeah, base pointers don't need to be aligned at all
<karolherbst> I thought at least they have to be
<jenatali> Clang/LLVM/SPIR-V assume kernel argument inputs are aligned, but you can do arbitrary pointer math to produce unaligned pointers
<alyssa> sounds like OpenCL on M1 would be a world of pain
<karolherbst> ohh.. right
<karolherbst> sure
<jenatali> And then they do annotate the alignment on those loads/stores as explicitly under-aligned
<alyssa> or just dog slow if we need to lower everything in NIR
<karolherbst> but the question is, if the result is defined or not
<jenatali> alyssa: DXIL doesn't support unaligned loads/stores either FYI, we lower it in NIR
<alyssa> jenatali: I guess if the bad case is annotated it doesn't affect perf of well written code?
<jenatali> Right
<alyssa> jenatali: awesome stealing your NIR pass then thanks! ;-p
<karolherbst> jenatali: right.. so as long as the compiler always knows what the true alignment is, you can make it work
<karolherbst> and I think that is what alyssa cares about here
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<karolherbst> if you have to load more and mask, so be it
<karolherbst> nvidia hw can also not load unaligned :D
<karolherbst> so I think longterm we need to move such a pass into core mesa
<jenatali> Yep, makes sense
<jenatali> At some point I need to look into re-vectorizing loads/stores after this splitting I think
<karolherbst> we have a pass for that I think :D
<jenatali> Yeah I know, I want to say it needs some callback or complex user data to make it work though
<karolherbst> ahh
<karolherbst> could be
<jenatali> There was some reason I didn't just add it
<karolherbst> I need to change it in order to use it inside nouveau as well
<alyssa> I want to do CL-on-M1 but like
<alyssa> Panfrost
<alyssa> and school
<alyssa> and other M1 things
<karolherbst> alyssa: well.. just have a gallium driver and it should work mostly, no?
<karolherbst> I think 95% of the CL fixes have to be done inside clover anyway
<jenatali> A gallium driver that supports compute and Clover's quirks, sure
<karolherbst> I just have higher priorities than CL atm ...
<jenatali> Alas, same
<karolherbst> but if I look back at where I started with all the CL stuff, I think we ended up with a better situation at least :D
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<alyssa> karolherbst: seems like an airlied job :-p
<karolherbst> I have a joker, but I won't disclose it yet
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<jstultz> mripard: hey! apologies, I hadn't looked at the thread since I had tested it, so I didn't realize you were blocked on me. terribly sorry!
<jstultz> mripard: ok, double-checked the patch is the same as what I tested earlier, and sent out an acked by, let me know if you need anything else.
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<mripard> jstultz: great, thanks !
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<jekstrand> Ugh... Why do c11 thread timeouts have to be relative to CLOCK_REALTIME?!?
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<ajax> ugh, why is the present extension so close to being good and yet so utterly bad
<airlied> lack of engaged reviewers when Keith wrote it :-P
<ajax> we know we can change these things right?
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<airlied> just need to find a engaged reviewer to validate it :-P
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<alyssa> nose goes
* Lyude covers nose
* alyssa covers
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<airlied> Lyude: that topic pull fails to build for me on arm32
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<HdkR> Nice, -Werror strikes again
<imirkin> is it coincidence that agd5f _just_ sent out a patch which fixes this?
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<Lyude> airlied: sigh, I tried :S. hopefully agd5f's patch fixes it, if you need I can add it to the topic branch
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<airlied> Lyude: please do
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<Lyude> airlied: merge conflict, but it looks really trivial. Just compile testing this real quick and then I will go ahead and push
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<Lyude> agd5f: btw, have y'all considered just removing the CONFIG_DRM_AMD_DC_DCN option entirely?
<airlied> Lyude: floating point problems
<Lyude> Ah
<airlied> Lyude: still seeing a warning with latest branch
<airlied> agd5f: ^
<Lyude> did they somehow rename that to coding instead of encoding like they did with link_coding_cap
<pinchartl> airlied: I've CC'ed you on a trivial 4CC addition patch, not for the 4CC itself, but because it's a format that isn't used by any DRM/KMS kernel driver at this point. it's needed by userspace only, in libcamera, as we use the DRM/KMS 4CCs to avoid creating yet another set of 4CCs
<pinchartl> I don't want to sneak this in without an approval of the rationale
<airlied> Lyude: oh didn't get agd5f patch in that
<airlied> just different parallel compile path led to warning
<Lyude> oooh, gotcha
<Lyude> yeah it seems to compile without warnings when I disable DCN here (using an x86_64 config)
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<Lyude> airlied: just resolving a conflict on drm-tip now