<alyssa>
(like, the swizzle is a 3-bit enum, even though there are 256 different swizzles)
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<alyssa>
which does make you wonder how to implement arbitrary 8-bit vec4 swizzles doesn't it ..
<dschuermann>
oh wow! nice task: does this set of swizzles allow arbitrary swizzles and for bonus points: what is the worst case number of shuffle instructions? :P
<alyssa>
I worked this out once, uh
<alyssa>
I seem to recall a solution with 2 shuffles for any swizzle
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<alyssa>
introducing...
<alyssa>
MKVEC.v4i8
<alyssa>
nir_op_vec4 for 8-bit sources, each source can specify a single lane (byte)
<alyssa>
but the lane selects are single bits -- you can only pick byte #0 or byte #2
<alyssa>
if you tie all the sources together, that means MKVEC.v4i8 acts as a swizzle: xxxx, xxxz, xxzx, xxzz, ...
<alyssa>
I believe I convinced myself any vec4 swizzle can be done with MKVEC.v4i8 followed by SWZ.v4i8, or something like that
<dschuermann>
hm, without much thinking (because it's getting late here), my first idea would be some very late backend NIR pass which inserts mov's to do the swizzles
<alyssa>
ahhhh, no, I think my too-clever-for-my-own-good solution was:
<alyssa>
1. temp = (packed_vec4 >> 8)
<alyssa>
2. swizzled = mkvec(.., .., .., ..)
<alyssa>
where each arg of the mkvec is given by the truth table
<alyssa>
x --> packed_vec4.b0
<alyssa>
y --> temp.b0
<alyssa>
z --> packed_vec4.b2
<alyssa>
w --> temp.b2
<alyssa>
It should be obvious that works for any possible vec4 swizzle and that it requires at most 2 instructions.
<dschuermann>
but doesn't shortcut on the simple swizzles?
<alyssa>
sure, I'm answering "what is the worst case number of shuffle instructions?"
<dschuermann>
right... two isn't bad
<alyssa>
the real answer is of course "who uses 8-bit support anyway?"
<dschuermann>
some pseudo-op + late lowering in your backend might help recognize pattern you can optimize
<alyssa>
for now we don't support vectorized 8-bit ops at all
<alyssa>
and so far have no use case to justify the massive effort required to change that
<dschuermann>
yeah, I'm already back to the 16bit stuff :)
<alyssa>
yep yep
<alyssa>
16bit is far more reasonable
<alyssa>
(and the worst case is a single shuffle instruction, since SWZ.v2i16 supports all 4 possible swizzles)
<alyssa>
---Wait, no
<alyssa>
SWZ.v2i16 does not support the identity swizzle 🙃
<alyssa>
The encoding that should be SWZ.v2i16 + identity is actually...
<alyssa>
....MOV.i32
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<jekstrand>
dschuermann: Having ideas without thinking? You must be turning into a senior engineer!
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<alyssa>
anholt: !14370 marge is broken on the inside
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<tacokoneko>
other software affected by the same issue included geodesicgears from xscreensaver and legacy versions of Minecraft. i am very happy with his patch it fixes all of them
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<HdkR>
Nice. I should keep virgl improvements on my radar since I'm using Parallels these days
<jekstrand>
Just need Zink on venus on MoltenVK :)
<HdkR>
If the VM takedown issues can be fixed on the virgl side rather than the kernel side I would be happy :P
<jekstrand>
If the VM is doing it right, it should be able to run Vulkan (and hence MoltenVK) in a subproess where it should be reasonably safe. Assuming the kernel is robust, that is.
<HdkR>
Running Half-Life 2 in a VM with Virgl passthrough is enough to crash the full VM for Parallels :D
<jekstrand>
That sounds like a virgil kernel problem
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<HdkR>
Probably. kernel log is filled with `1486695.592757] [drm:virtio_gpu_dequeue_ctrl_func [virtio_gpu]] *ERROR* response 0x1200 (command 0x207)`
<HdkR>
Either that or their MacOS side interface explodes
<jekstrand>
¯\_(ツ)_/¯
<HdkR>
Need that Native Linux mesa driver to resolve my woes :P
<jekstrand>
Start hacking!
<jekstrand>
:P
<jekstrand>
Unlike me, you've already got the hardware. :P
<HdkR>
I'm busy bringing real games to the hardware for when the driver works ;)
<jekstrand>
hehe
<jekstrand>
It does sound terribly interesting
<jekstrand>
But I don't want to get conned into writing a kernel driver. :-P
<Sachiel>
(again)
<jekstrand>
:P
<HdkR>
That means you have experience and are already a good fit for it though
* HdkR
hides Android experience under the rug
<jekstrand>
Honstly, it wouldn't be too terrible, depending on how the submit hardware works.
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<HdkR>
They're crazy enough to embed some IOKit textual thing. It could be just as nutty.
<jekstrand>
Intel HW seems far more annoying than it needs to be. Some of it is necessary like juggling page tables.
<HdkR>
Dealing with page tables gives me a headache. Setting up the PML4 for a VM was about all I could handle
<HdkR>
And at least when I long jump from 64-bit mode to 32-bit mode, I only need to set up some segments! :D
<jekstrand>
The best part is that every level of the page tables is technically different except that most are the same except when they're not.
<jekstrand>
And Intel (I almost said "we" there. Hah!) has two different kinds of page tables for global (used for context images, display and a few other things) and the per-process page tables used for everything touchable by userspace.
<HdkR>
Very cute
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<jekstrand>
Every part of the submit hardware has something pathologically annoying.
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<HdkR>
Required by law
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<tzimmermann>
airlied, danvet, FYI still nothing new in drm-misc-next-fixes this week
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<dschuermann>
jekstrand: hehe, or just falling asleep :-]
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<tomba>
drm-intel/drm-intel-gt-next failed to merge while pushing a simple omapdrm fix to drm-misc-next. Anyone want to have a look?
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<anholt>
alyssa: that error will happen sometimes when we're getting errors from gitlab, like we are due to the ongoing git issues.
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<zmike>
dcbaker / eric_engestrom: is that new stable syntax tag in use yet?
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<dcbaker>
zmike: not yet
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<jenatali>
alyssa: Did you mean to comment on on !14400 after your r-b comment? Not sure why you pasted the commit log entry as a comment
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<jenatali>
I.e. any reason I shouldn't go ahead and merge it
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<jekstrand>
jenatali: I think that's just alyssa's very weird way of interacting with gitlab
<jenatali>
That was my guess, just want to make sure it wasn't supposed to be some kind of "wait, don't do this" comment instead
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<kisak>
jenatali: my joke about tesselation taking more than twice as many patches as it initially looked was supposed to be a joke, I didn't expect you to take it seriously :P
<jenatali>
kisak: Yeah, I didn't either. It's not quite twice as many as original I think since it's just based on a few other feature branches
<jenatali>
Yeah it's only 41
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<kisak>
might be nice to update docs/features.txt and add notes to docs/relnotes/new_features.txt as you scratch off this bigger ticket items.
<kisak>
s/this/these
<jenatali>
Oh yeah, I always forget about those
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<idr>
So... CivilizationV-trim--s705-761-f762-v20201203.trace says it fails, but it also says there are zero pixels different.
<anholt>
checksum changed but below the delta threshold for the perceptual image diffing, I'd guess.
<idr>
Ah.
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<idr>
It's in a test that won't block a merge, so I'm not worried. I just thought I'd mention it... in case it's an unknown oddity.
<idr>
anholt: I'm planning to mess about with r300 this weekend... does that driver produce data for shader-db? Or is that a thing that still needs to be added?
<anholt>
it can crash on some of shader-db, but just take some plausible subset that doesn't crash
<idr>
My plan for this weekend was to make r300 use the generic pass from !14308.
<anholt>
would probably be good for NTT, though use_tgsi debug flag still exists so not sure if we want to retire the old code yet.
* idr
looks at !14309...
<idr>
Oh, right... this is like the old problem that r200 had with negative offsets in constant array indexing. We did shader math instead of just adjusting where things were in the array to (try to) eliminate the negative offsets.