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<karolherbst> turns out... a fast GPU helps with CL CTS runtime...
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<karolherbst> ========================================================================================
<karolherbst> >> TEST on CL_DEVICE_TYPE_DEFAULT PASSED
<karolherbst> ========================================================================================
<karolherbst> (30-Sep 04:53:05) Testing complete. 0 failures for 57 tests.
<karolherbst> guess I have two conformant drivers now...
<karolherbst> only took roughly 2 hours on radeonsi
<karolherbst> quite impressive
<karolherbst> (and I have potential ideas on making it even faster)
<karolherbst> though I think it's only the embedded profile because radeonsi only exposes 32 read and 16 write images, but needs 128/64 instead
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<mareko> zmike: are you sure that will help anything?
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<mareko> Kayden: DISCARD_RANGE is implemented as "upload into a staging buffer and then copy it to the original buffer". When you map UNSYNCHRONIZED, you don't need the staging buffer dance, so that's why the flag is cleared.
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<mareko> Kayden: When you map a buffer PERSISTENTly, you want the map pointer to point to that buffer directly, not the staging buffer. DISCARD_RANGE causes buffer_map to return the pointer to the staging buffer and buffer_unmap should do the copy from staging, but PERSISTENT mappings don't expect to see buffer_unmap before use, so any upload into PERSISTENTly mapped buffers with DISCARD_RANGE would only upload
<mareko> into the staging buffer and it would never get copied into the original buffer without buffer_unmap.
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<mareko> UNSYNCHRONIZED and DISCARD_RANGE use entirely different codepaths, they are not compatible
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<mareko> DISCARD_RANGE is pipelined on the CPU but it waits for idle on the GPU, so it's the second worst thing after glFinish
<Kayden> Okay, maybe that's where the disconnect is for me
<Kayden> If a resource is idle, I can promote things to UNSYNCHRONIZED. But at least for tiled images, I cannot map those directly, because it expects a linear view. So I have to use staging buffers.
<mareko> TC doesn't do anything for textures
<mareko> also TC doesn't allow drivers to promote anything to UNSYNCHRONIZED
<Kayden> right
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<mareko> one reason for that is that replace_buffer_storage doesn't copy the valid range, so the range is invalid after that
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<Kayden> I guess I've been thinking about it as staging vs. direct map rather than synchronous map vs unsynchronized
<Kayden> I want to use a staging buffer for things like...uncached reads, or active compression that the CPU can't understand, or the buffer being busy (just enqueue work rather than flushing it and waiting and CPU mapping)
<Kayden> if I'm using a staging buffer I want to know whether the existing contents may be necessary
<Kayden> because if you might be doing partial writes, then a staging map needs to copy the existing data into the staging buffer, then return a map, let the user change the data arbitrarily, then blit it back on unmap/flush_region
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<Kayden> a buffer might be idle, so in theory we could do an unsynchronized map of it, but it's still in VRAM that would have uncached reads...
<Kayden> hm. I'd been looking at si_buffer_transfer_map, but I guess I need to look at si_texture_transfer_map too. they're the same for me.
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<Kayden> I guess for read/write buffers without discard range and unsynchronized, you always do a direct map, rather than doing a staging buffer.
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<Kayden> even if the memory is uncached
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<Kayden> Okay, I also note that si_texture_transfer_map only copies image data into the staging buffer if PIPE_MAP_READ is set. Which means if you only set PIPE_MAP_WRITE, and don't write the entire box, then the rest of the contents are lost
<Kayden> iris doesn't do that. it preserves the existing contents if you send PIPE_MAP_WRITE and -not- DISCARD_RANGE.
<Kayden> if you wanted that for radeonsi I guess you'd have to pass PIPE_MAP_READ | PIPE_MAP_WRITE
<Kayden> which...I guess MapTextureImage is our own internal API of sorts, so we can make it work however we want
<Kayden> but that's not exactly consistent with buffers IMO
<Kayden> Okay, though...texstore.c has been setting GL_MAP_WRITE_BIT | GL_MAP_INVALIDATE_RANGE_BIT on MapTextureImage calls since 2012. And _mesa_access_flags_to_transfer_flags turns that into PIPE_MAP_WRITE and either PIPE_MAP_DISCARD_RANGE or PIPE_MAP_WHOLE_RESOURCE.
<Kayden> so either it's supposed to mean something for textures, and I'm right to respect it, or it isn't, and texstore shouldn't set it
<Kayden> Brian made that change so I suspect it's used by svga
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<pq> emersion, I've forgot all context and not really in the mood to dig into it.
<emersion> ok
<emersion> no worries
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<pq> bl4ckb0ne, gnu_symbol_visibility:hidden is a way to stop exporting *all* non-static symbols. Then you somehow mark those symbols you actually want to export.
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<lvl1slime> is the gitlab down for anyone else?
<lvl1slime> nvm it works
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<bl4ckb0ne> pq: yeah i got that part, what's driving me crazy is that it works for gles but not egl
<eric_engestrom> yeah it makes no sense to me either, but I don't really have time to dig into it right now
<bl4ckb0ne> im poking around
<eric_engestrom> but I don't think patching the khronos headers is something we should do
<bl4ckb0ne> i could upstream the fix
<eric_engestrom> yeah if the patch is upstream that's fine, but I just don't want us to carry patches on top of upstream khronos headers anymore
<bl4ckb0ne> agreed
<emersion> eric_engestrom: we already patch the headers for MESA_NO_X11 right?
<eric_engestrom> yeah, that's what's being removed here
<bl4ckb0ne> latest rev switched to USE_X11 for xlib stuff
<daniels> why not just -DKHRONOS_APICALL="..." ?
<bl4ckb0ne> im meson?
<bl4ckb0ne> in*
<eric_engestrom> (https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18848 for those wanting more context)
<eric_engestrom> daniels: in my experience `-DFOO=BAR` doesn't work well if `BAR` has `()`
<emersion> the header defines it right?
<eric_engestrom> different compilers expect different escaping
<eric_engestrom> ah wait you're right
<bl4ckb0ne> emersion: KHR header yeah
<bl4ckb0ne> KHRONOS_APICALL
<emersion> so i don't think we can override that
<bl4ckb0ne> its then copied ad EGLAPI, GL_API and GL_APICALL
<eric_engestrom> no wait (again) I just checked it's the initial define that's the issue
<eric_engestrom> the `# define KHRONOS_APICALL __attribute__((visibility("default")))`
<emersion> we could include the KHR header, #undef, then #define again…
<emersion> and include the EGL header
<eric_engestrom> we could do that yeah
<emersion> eric_engestrom: the new header #defines KHRONOS_APICALL to be nothing
<emersion> and we want instead to define it to be __attribute__((visibility("default"))
<eric_engestrom> indeed
<bl4ckb0ne> yes
<eric_engestrom> the thing I want to understand before we go with one hack or another, is why the symbols are still exported for GL but not for EGL
<bl4ckb0ne> but EGLAPI is only used in the egl header
<emersion> eric_engestrom: does GL uses the same KHR header?
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<bl4ckb0ne> yes
<bl4ckb0ne> GLES, GLES2 and GLES3
<bl4ckb0ne> ive ran the symbol check on all three, works just fine
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<emersion> i mean, does GL use that KHRONOS_APICALL
<daniels> is APICALL the right place for visibility tho? I'd expect API call to be about parameter-passing convention, not 'hey can you actually include this symbol'
<daniels> and I think someone else noted as well that you can put the visibility attr on the definition rather than the declaration, which wouldn't require modifying any headers
<emersion> daniels: right, that would be better
<bl4ckb0ne> so putting PUBLIC on all the egl api functions?
<emersion> but i'm not sure that's possible with the EGL loaders and stuff?
<bl4ckb0ne> iirc those are not loaded
<bl4ckb0ne> its core functions, like eglBindAPI and eglTerminate
<emersion> so that's all about the mesa EGL entrypoints?
<bl4ckb0ne> about symbols yeah
<emersion> we generate these somewhere right?
<emersion> could just add the visibility attr to the generated code
<bl4ckb0ne> yeah, there's the PUBLIC macro in utils
<bl4ckb0ne> im testing it atm
<bl4ckb0ne> yup it works
<emersion> nice
<bl4ckb0ne> had doubts on musl with __GNUC__
<bl4ckb0ne> but oh well it seems to be working
<emersion> it's not about musl, it's about the compiler
<bl4ckb0ne> works even on clang?
<emersion> we pass default_visibility=private to the compiler
<emersion> and then explciitly mark some functions as public
<emersion> each compiler which supports the default visibility arg also supports the C attr
<bl4ckb0ne> yeah i saw that in meson, we pass hidden to everything
<bl4ckb0ne> maybe thats what we should do for wlroots
<emersion> we already do it but in a different way
<emersion> instead of littering C attrs everywhere, we have a rule saying that all symbols starting with "wlr_" are public
<emersion> and the rest are private
<eric_engestrom> emersion: GL symbols stuff is generated, but EGL symbols hard-coded
<bl4ckb0ne> ah maybe thats why
<bl4ckb0ne> maybe during generation the script sprinkles a bit of visibility attributes
<eric_engestrom> maybe
<eric_engestrom> anyway I think the suggestion of `sed s/EGLAPIENTRY/PUBLIC/ -i src/egl/main/eglapi.c` is a reasonable fix
<bl4ckb0ne> shouldnt we keep EGLAPIENTRY?
<emersion> yeah, i'd add PUBLIC but keep the prev one
<eric_engestrom> right yes, I got EGLAPI and EGLAPIENTRY confused
<javierm> tzimmermann: the combination of shadow-buffered planes with DRM_SHADOW_PLANE_MAX_*, damage areas, and buffer management sometimes makes my head hurt :)
<tzimmermann> same here
<tzimmermann> give me a bit to type a reply by mail
<javierm> tzimmermann: thanks!
<pq> javierm, welcome to winsys land? :-D
<javierm> pq: haha
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<ccr> "Winsys Land" sounds like a "good place to have bad time" -type unamusement park
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<eric_engestrom> bl4ckb0ne: CI is looking very green so far :)
<bl4ckb0ne> :D
<bl4ckb0ne> thats nice because i have more EGL update on the way
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<eric_engestrom> πŸš…
<eric_engestrom> ah, we only fixed the "plain egl" symbols, we forgot about glvnd
<bl4ckb0ne> nooooo
<bl4ckb0ne> so we do have to fix the header right
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<bl4ckb0ne> ah wait i got it all wrong
<karolherbst> anybody up for reviewing two smaller rust patches in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18802 ?
<eric_engestrom> bl4ckb0ne: I posted the one-line patch on the MR
<bl4ckb0ne> already added it :D
<tzimmermann> vsyrjala, hi. this test in the helper ensures that an enabled crtc always has a primary plane attached to it. it originated from the simplekms helpers and we want to use that test in other drivers as well. added in 765831dc27ab ("drm/simple-kms-helper: Fix the check for the mismatch between plane and CRTC enabled.")
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<bl4ckb0ne> eric_engestrom: looks more green now
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<eric_engestrom> bl4ckb0ne: indeed, it looks ready to merge; I would wait a bit though, in case anyone has an objection
<bl4ckb0ne> absolutely
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<vsyrjala> tzimmermann: that looks egually strange to me. nothing there guarantees the plane to be actually enabled. so there must be some other check in the driver somewhere if that is really a hw requirement
<vsyrjala> or is this just to deal with some other code which assumes that every crtc has a primary plane?
<vsyrjala> i gues the setcrtc/page flip ioctls might do that
<tzimmermann> vsyrjala, by 'enabled' you mean visible on the screen? the drivers, such as ast, call drm_atomic_helper_check_plane_state() with can_position == false for their primary plane. this will ensure that the plane is on the screen
<tzimmermann> as you said, we want to ensure that every enabled plane has a primary plane
<javierm> tzimmermann: s/plane/crtc right ?
<vsyrjala> iirc that only guarantees it's either fullscreen or not visible at all
<tzimmermann> yeah, typo
<tzimmermann> fullscreen vs invisible is all we need
<vsyrjala> vs. is not what i mean. i mean a 'fullscreen || invisible -> success, else -> failure'
<vsyrjala> btw the mga driver at least could easily simulate turning off the primary plane by just making the lut all black. the lut doesn't affect the cursor or overlay
<vsyrjala> similar thing might be possible on other old hw
<tzimmermann> i'm not sure what the sementic difference is. but what you describe is what we want, i think.
<vsyrjala> that implies you can turn off the primary plane, and therefore the check for the attached primary plane can't have anything to do with hw requiremets
<vsyrjala> therefore it must be about some piece of code assuming that a primary plane is always attached to a crtc
<tzimmermann> drivers call check_plane_state() with can_update_disabled == false
<vsyrjala> that just means you can't update the plane when the crtc is off. it doesn't mean you can't turn off the primary plane
<vsyrjala> iirc
<tzimmermann> what exactly do you mean by 'turn off'?
<vsyrjala> stop scanning out pixels
<tzimmermann> in ast we do that when we disable the plane. and then we want the crtc to be off as well
<vsyrjala> plane off can be achieved by either fb=NULL (plane is both logically off and actually off in hw), or by having it fully clipped (plane still logically on, but actually off in hw)
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<tzimmermann> i'm feeling dumb. i guess, you're talking about the case at https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/drm_atomic_helper.c#L856 ? but these primary planes cannot be scaled, rotated or repositioned. how can they be clipped?
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<karolherbst> Kayden: any further comments on the MR or is it good to go now? https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18670
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<zmike> mareko: on tilers yes, it looks to be a sizable (30%+) perf change in a number of cases
<zmike> I suppose it also depends on how efficiently the driver can parse the call queue from set_framebuffer_state, but I thought I'd get your input before I tried to wip it
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<agd5f> airlied, danvet, hey one last -fixes PR for recent board revisions. Sorry for the last minute changes
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<Venemo> agd5f: can you remind me where to find drm-next?
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<Venemo> thx
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<eric_engestrom> PSA: the 22.3 branchpoint was originally set for 2022-10-12 (the second wednesday of october) ie. less than 2 weeks from now, but given that XDC happens the week before zmike and Venemo have suggested we push it back a couple of weeks
<eric_engestrom> in other words, the 22.3 branchpoint is now set for 2022-10-26
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<Venemo> eric_engestrom: could it be pushed to the 1st week of november instead? october is not only xdc but also khronos f2f
<eric_engestrom> sure 2022-11-02 then :)
<Venemo> thanks
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<emersion> vsyrjala: eh, that check is quite simple
<emersion> vsyrjala: although many user-space programs just set all props each commit
<emersion> so i think we need to compare old/new and error out if there's a change
<vsyrjala> imo no one should attempt that approach with an async flip
<vsyrjala> it's too special
<emersion> well
<emersion> all user-space i know does this
<emersion> and changing it would be quite burdensome
<vsyrjala> no userspace has atomic async flips
<vsyrjala> i would think you also need special fallback handling for async flips. so dunno how "just blindly set the async flag, and then clear it i guess if it fails" approach would work
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<vsyrjala> if you did want to do the "check that everything didn't change" approahc then it's going to require code all over the place
<emersion> then i'd rather keep as it is right now
<emersion> amdgpu has what's necessary
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<vsyrjala> as far as you know. with no extensive tests it's hard to prove it
<vsyrjala> the simple check on uapi level woudln't need so much tests either since it's pretty much obviously correct. would still require some tests though
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<karolherbst> ajax: up for some more rust reviews? Like to land !18852 and
<karolherbst> !18802
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<swick> vsyrjala: so apparently EDID content can change when the display settings change. does the kernel notice the change?
<swick> but maybe there is so few displays that actually do that so it might not matter
<swick> even though they really should because half of the EDID data depend on the settings
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<vsyrjala> does the display pulse hpd sufficiently when that happens? that is when edid gets re-read
<swick> mhh, no idea, I don't have access to the display
<swick> do we get an uevent if an edid changed?
<vsyrjala> yes. assuming the hpd triggered the re-detect
<swick> okay, great, that means I can look for EDID changes in user space (assuming that displays behave as expected)
<vsyrjala> drm.debug=0xe should also show a flurry of activity in dmesg when the hpd happens
<swick> neat
<swick> I do how widespread that behavior is though
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<ajax> in issue #6911 we have a report that LTO builds work fine if you don't build d3d12 but crash if you do build it
<ajax> which is: super weird
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<ajax> trying to spin this as a conspiracy theory where msft is subtly sabotaging gl perf on linux by making a driver that defeats LTO
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<ajax> (ed. note: he is joking)
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<daniels> C++ being cursed in weird toolchain ways? I literally don't believe it.
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<RSpliet> I've worked on projects that would compile with GCC -O2, or with GCC LTO, but not O2+LTO.
<karolherbst> no way
<RSpliet> Well... it'd compile, but linking just gets stuck in an endless loop
<karolherbst> sounds like a compiler bug to me :P
<RSpliet> Yeah that's where I'd file this issue in
<karolherbst> or well.. linker bug
<karolherbst> try mold :P
<RSpliet> Shame it'll be darn near impossible to find a minimal test case for this
<karolherbst> you think uploading 2GB of binaries are not acceptable for a bug report?
<RSpliet> These aren't even OSS source files
<karolherbst> fun
<RSpliet> "Suck it up, use -O1" seems to be the acceptable work-around
<karolherbst> did you try to use O3?
<RSpliet> O4 even
<RSpliet> Don't ask
<karolherbst> damn
<RSpliet> Not my choice
<RSpliet> Think it would compile with O2+LTO with the right flavour of -DNDEBUG too, just to add more uncertainty to the mix
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<Newbyte> not sure whether this is the right place to ask, but can I somehow look at the instructions Mesa compiled my shader to?
<Newbyte> driver is Lima
<karolherbst> airlied: is there a reason llvmpipe doesn't expose PIPE_CAP_UMA?
<kisak> Newbyte: https://docs.mesa3d.org/drivers/lima.html suggests there's a LIMA_DEBUG which might have what you're looking for
<Newbyte> kisak: thanks, looks useful
<RSpliet> Newbyte: there's #lima for more in-depth questions on lima. Looks like the dev is AWOL, but is expected to be around again during working hours or something
<gawin> Plagman: would it be possible to release win7 driver for steam deck? (just for gpu, for single gpu passthrough) RDNA2 is still covered by driver for dedicated gpus on win7
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<ajax> karolherbst: i can't think of a good reason for it to set that to 0, looks like it's just always been that way
<danvet> agd5f, I guess you mean "pls make extra pull request"?
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<danvet> agd5f, I'll get that going if airlied doesn't beat me to it (next few hours, need to get stuffed with smoked salmon first now)
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<karolherbst> ajax: yeah.. that's what I am thinking as well.. I want to rely on the flag to decide how to sync shadow buffers, but not entirely sure yet
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<ajax> if swrast did say it was uma that'd be a pretty good heuristic
<ajax> so good that i'd say it's a bug that swrast doesn't
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<karolherbst> yeah so my current idea is to try to map with PIPE_MAP_DIRECTLY, but only if it's UMA, and if that fails fallback to a coherent staging shadow buffer, and then copy between the pipe_resource and the shadow resource
<karolherbst> for silly reasons I can't rely on transfers :/
<karolherbst> at least not for CLs map APIs
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<agd5f> danvet, yes. thanks!
<daniels> danvet: smoked salmon in pastry?
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<danvet> daniels, nah not that fancy
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<DavidHeidelberg[m]> zmike: shouldn't Marge already start on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18705 ?
<zmike> DavidHeidelberg[m]: I have no idea
<DavidHeidelberg[m]> maybe de-assign, assign? O_o
<zmike> again?
<DavidHeidelberg[m]> I don't see it running any pipeline & it's oldest in the list
<zmike> sigh
<zmike> when does marge 2.0 come out
<zmike> the smarter one
<DavidHeidelberg[m]> so I guess now other two will pass and then 18705...
<DavidHeidelberg[m]> zmike: I think they shouldn't pick from The Simpsons :D
<DavidHeidelberg[m]> still better than the "Homer bot" :D
<zmike> I want the einstein bot
<zmike> where it just fixes all your errors and slams it in
<zmike> why does the pipeline for https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18705 say that the merge is blocked and requires manual action
<zmike> this is new
<zmike> all my MRs have it, in fact
<DavidHeidelberg[m]> I see gitlab update... I'm afraid...
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<DavidHeidelberg[m]> zmike: I think that's for the case of manual merging (not with Marge)
<zmike> but other MRs don't have this?
<FLHerne> zmike: surely that should be called Lisa
<zmike> it has the green icon instead of red
<karolherbst> zmike: press rebase and wait
<karolherbst> then it becomes red
<zmike> that's stupid
<zmike> why is this a thing
<karolherbst> because you can require MRs to pass CI
<danvet> agd5f, dim: 5369e662f990 ("drm/amdgpu/gfx11: switch to amdgpu_gfx_rlc_init_microcode"): committer Signed-off-by missing.
<danvet> dim: dd00f3eeba5b ("drm/amdgpu: save rlcv/rlcp ucode version in amdgpu_gfx"): committer Signed-off-by missing.
<danvet> agd5f, ^^ can you respin? or do I need to cherry-pick them all and sob myself?
<agd5f> I can respin quick. sorry
<danvet> agd5f, ah cool you're here, just sent out the mail too to increase odds :-)
<danvet> agd5f, pls ping me since I'm off baking some tarte now
<danvet> daniels, ^^ living up to expectations
<agd5f> yes, cherry picked from the wrong branch when I was putting that together
<karolherbst> have fun *said in a nice and supportive, but also midly enviously voice*
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<agd5f> danvet, send.
<daniels> danvet: I’m so proud
<javierm> danvet: I can't resist to mention that you could actually be *cherry picking* depending on the ingredients of your tarte :)
<daniels> πŸ₯πŸ™„
<danvet> javierm, long past cherry season here ...
<javierm> daniels, danvet: bad joke I know haha, but couldn't resist
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<danvet> javierm, tbh cherry seasons is somehow always the one I miss
<danvet> I have some more involved recipes for them, but always drag out for too long :-(
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<javierm> danvet: according https://www.swiss-farmers.ch/seasonal-calendar/seasonal-calendar-fruits/ it seems to be only in your summer
<danvet> yeah ...
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<jstultz> jekstrand: airlied: wanted to follow up on the idea of having DRM_IOCTL_SYNCOBJ_* ioctls be callable against an exported drm_syncobj fd... I'm thinking about a case where one of the processes doesn't have permissions access to the drm device to call the ioctls against (even to import the syncobj fd to a handle).
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<agd5f> danvet, thanks!
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<alyssa> dcbaker: Maybe _you_ will be the hero that unifies the GenXMLs.
<DavidHeidelberg[m]> zmike: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/29299890 something is fishy. First minio upload times out, not the job times out... this not going to finish I think, maybe the runner. But if I cancel, the pipeline will fail (because it's last job)
<DavidHeidelberg[m]> seems like it's not a good day to merge... haha
<dcbaker> alyssa: uh oh
<alyssa> dcbaker: You don't seem excited :(
<alyssa> it's admittedly unclear to me which GenXML should be canonicalized
<alyssa> (i.e. moved from src/vendor/genxml to src/genxml and then extended to cover the other vendors)
<zmike> DavidHeidelberg[m]: I think I saved it
<dcbaker> You say here, but all I can think of is a book I read once where the the Hero is actually unwittingly the servant of the bad go
<alyssa> Intel has the benefit of being the original
<dcbaker> alyssa: we are the one true genxml :)
<alyssa> yeah
<alyssa> v3d needs an extension to handle unaligned packing and unpacking
<DavidHeidelberg[m]> zmike: I see what u did, retriggered successful job and stopped & triggered this one, right?
<alyssa> this is easy enough to do with find-and-replace if you fork Intel (as v3d does)
<zmike> DavidHeidelberg[m]: pray with me πŸ™πŸ™πŸ™
<alyssa> Handling both cases in a unified codebase seems harder
<DavidHeidelberg[m]> zmike: sending thoughts and prayers... :D
<zmike> need πŸ™πŸ€žπŸ™ to beat the 60 minute timer now
<zmike> don't think I'll make it
<alyssa> panfrost has a bunch of incremental extensions: Arm-style modifiers, word:bit syntax for start, <aggregate>s though that might be dubious, printing tailored for reverse-engineering
<alyssa> all of that could be merged back into Intel GenXML without breaking compat, I think
<DavidHeidelberg[m]> btw. who here have ASM skills? asking for a friend... https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18644
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<alyssa> asahi is a straight up fork of panfrost
<alyssa> imagination has gone off and done their own thing and while it's definitely in the GenXML family tree IDK if it's worth considering
<alyssa> I have half a mind to just promote src/intel/genxml to src/genxml and then port my drivers
<zmike> 6 minutes to finish 10 minutes of job definitely not looking good
<DavidHeidelberg[m]> ETA 9 minutes :'(
<zmike> sigh
<alyssa> oh, also <field/> using size attributes instead of length
<alyssa> I think that was a v3d change that panfrost and asahi inherited
<zmike> these Intel jobs take forever in ci
<alyssa> Right so the GenXML family tree looks like:
<zmike> 5 mins just to start
<alyssa> Intel ---> v3d ---> panfrost --> asahi
<alyssa> |
<alyssa> |---> imagination
<zmike> oof
<alyssa> imagination and asahi are the most distant genxmls
<DavidHeidelberg[m]> zmike: yeah, I was thinking if would be possible prepare the runner, predownload stuff and just push it when previous steps successed
<alyssa> which is hilarious because they're the two that share a bunch of structures identically
<DavidHeidelberg[m]> zmike: since usually we wait for `debian-testing` it would make sense pre-download all the stuff and just assume mesa will build
<alyssa> not sure that tree is any worse than
<alyssa> Intel --> Intel + panfrost + asahi
<alyssa> |
<alyssa> |--> v3d
<alyssa> |
<alyssa> |--> imagination
<alyssa> which looks like the natural result of me driving forward "unify genxml" without buy in from anyone else.
<zmike> DavidHeidelberg[m]: could be a nice speedup
<alyssa> Comparison of an analogous struct between powervr and agx
<alyssa> in their respective current xml's
<alyssa> You'll notice stylistic differences (C-escaping strings manually versus using natural names and escaping in the python)
<alyssa> ordering differences (imagination lists the fields backwards)
<alyssa> size/length difference (in different units too!)
<alyssa> size/end difference on the <field/>
<alyssa> but they're both fundamentally describing the same thing in the same way
<alyssa> I also don't know if it makes sense to churn 60k lines of XML for the sake of uniformity.
<alyssa> uh wait apparently img branched off v3d, not intel. fun
<alyssa> oh and imagination added <if> stuff which IDK if anyone else can use
<alyssa> and maybe they don't actually work ok
<DavidHeidelberg[m]> hmm, performance traces now run by default? O_o
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<DavidHeidelberg[m]> zmike: or did you triggered them by hand?
<zmike> ?
<zmike> I don't trigger anything by hand
<DavidHeidelberg[m]> hmm. These jobs should run after Marge is done.
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<dcbaker> alyssa: doesn't freedreno also use genxml these days?
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<dcbaker> they have logic in their xml? gahh, that sounds like msbbuild xml. please don't try to shoehorn logic into your declarative format :(
<alyssa> dcbaker: envytools
<alyssa> for freedreno
<dcbaker> ah, okay
<alyssa> imagination has logic in the xml that doesn't actually do anything but generate comments
* dcbaker is afraid
<zmike> so you're saying they're...imagining logic?
<zmike> alright fine I'm leaving