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<karolherbst> I am thinking about moving load_work_dim lowering into rusticl, because it seems like no hw actually supports that natively
<alyssa> seems reasonable
<anholt_> +1
<karolherbst> though I think we still need to keep it in the gallium API
<karolherbst> at least backend compilers won't have to bother with that
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<karolherbst> k.. done. I think I should check if the system val is actually used before adding/creating the var, but oh well
* karolherbst wonders if the fail count is single digit this run
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<karolherbst> rude... it's not
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<karolherbst> "Pass 2342 Fails 7 Crashes 3" I think that's enough for today
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<lina> GNOME, Firefox, Neverball, KDE apps, and more are now running natively on Apple M1 with my Rust DRM driver and alyssa's Mesa driver ^^
<lina> There is a very cursed hack involved since GPU TLB (or cache?) invalidation is still broken or not synced properly, but it works stably with the hack!
<mupuf> lina: congrats! I can foresee some gears spinning during your presentation :p
<lina> I think I'm already doing better than that ^^
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<mupuf> hehe, looking forward to it :)
<airlied> lina: there is nothing better than gears
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<lina> airlied: eglgears was working yesterday already! Full GNOME took a bit longer ^^
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<pq> mdnavare, no, I was not asking about VRR freq outside VRR range. I was asking from the oldchdool fixed-freq mode lines vs. monitor Horz/Vert freq limits from the VGA era.
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<pq> bl4ckb0ne, extension functions are not (supposed to be) exported.
<pq> *oldschool
<pq> mdnavare, I believe the kernel will filter the mode list against the monitor Horx/Vert freq limits, but what I don't know if it stops userspace from programming a custom modeline that exceeds those limits (and has physically destroyed monitor hardware in the CRT era).
<pq> *Horz
<pq> It's wasn't Linux, but I've seen a too high video mode kill a monitor. IIRC I also fixed it (or attempted to fix it) by replacing the flyback transistor.
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<jfalempe> tzimmermann, I sent a patch to add support for Atomic gamma lut for the ast driver.
<jfalempe> but I only tested it remotely, so I didn't see if it actually change the gamma on a VGA screen.
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<dj-death> anybody running into 504 errors from gitlab fdo?
<pq> dj-death, that's maintenance WIP
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<dj-death> pq: ah thanks
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<tzimmermann> jfalempe, thanks. i'll give it a try
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<tzimmermann> jfalempe, i'm looking at the patch. couldn't you simply copy the code from mgag200?
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<jfalempe> tzimmermann, hum I think I copied a lot from mgag200. ast is simpler because it doesn't support 16bits colors.
<jfalempe> or you mean having a separate function to set the default if no data are provided ?
<tzimmermann> jfalempe, but ast does support 16-bit color modes: https://elixir.bootlin.com/linux/v5.19.12/source/drivers/gpu/drm/ast/ast_mode.c#L537
<tzimmermann> that's the exported 4cc constant. the code is at https://elixir.bootlin.com/linux/v5.19.12/source/drivers/gpu/drm/ast/ast_mode.c#L443
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<tzimmermann> technically, it supports even 15-bit formats, but doesn't announce them
<jfalempe> hum so either the gamma code doesn't work with 16bits, or the hardware use the table the same way as 24bits.
<tzimmermann> i don't think anyone really uses that 16-bit mode, or even tested it
<tzimmermann> to add gamma support, i suggest to copy the mgag200 code and replace the HW-access functions
<tzimmermann> should be straight forward
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<tzimmermann> i can help with testing and debugging, if you want
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<jfalempe> ok, I will do a v2, and yes I need help to test.
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<anshuma1> airlied: while pushing https://patchwork.freedesktop.org/series/108900/? to drm-intel-gt-next , drm-tip rebuild failed and there was conflict from drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c probbaly from https://cgit.freedesktop.org/drm-tip/commit/?id=e8573000f4bbb7bfe48da5de5981e5dca048c433
<robert_mader> Hi - I'm currently facing some issues regarding EGL_EXT_image_dma_buf_import_modifiers and llvmpipe on a CI. From what I understand, llvmpipe should never advertise this extension, right? I do see cases though were it is - and I suspect it to happen when a "hardware" (VirtIO) driver fails to initialize properly and the GL context ends up being provided by llvmpipe. Is that a known case? And does anyone have a hint what could
<robert_mader> way to detect that? Checking for `EGL_MESA_device_software`?
<anshuma1> airlied: could you pleae help on that.
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<daniels> robert_mader: src/gallium/frontends/dri/dri2.c is you - dri2_init_screen_extensions() will set the extension if PIPE_CAP_DMABUF is set
<tzimmermann> jfalempe, thank you
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<jfalempe> tzimmermann, ast also support "CRM_FORMAT_C8" for primary plane, this is 8bit monochrome ?
<jfalempe> so probably can use the same as RGB888 for gamma value ?
<tzimmermann> jfalempe, it's a 256-color palette
<tzimmermann> the palette will be taken from the same values as the gamma table
<tzimmermann> so the code for xrgb8888 can be uses as-is to fill the table
<jfalempe> ok thanks
<tzimmermann> TBH, i have no idea is C8 really works in practice. no one uses these formats today
<tzimmermann> s/is/if
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<robert_mader> daniels: thanks. Do you happen to know whether it's a possible that X11 EGL falls back to llvmpipe while previously having initialized and advertised EGL extensions from the hardware device? Do you recall ever having seen that? (I think I do on some broken setups - but only with EGL on X11)
<daniels> robert_mader: I can't for the life of me imagine how that would happen, no
<daniels> robert_mader: but I will note that PIPE_CAP_DMABUF is true for llvmpipe, so advertising dmabuf import & the modifier extension _is_ expected
<javierm> tzimmermann: I'll review the udl series you mentioned yesterday but before that I've a question from reading the cover-letter
<javierm> tzimmermann: in patch #9 you will get rid of drm_atomic_helper_damage_merged() and instead use a damage iterator, it's the second time you do on a driver (first was simpledrm)
<javierm> tzimmermann: should using drm_atomic_helper_damage_merged() be something that other drivers would like to avoid too then ?
<tzimmermann> javierm, i think so
<robert_mader> daniels: ok, then I need to check where it usually gets disabled (it does, see e.g. `eglinfo` or running any app with `LIBGL_ALWAYS_SOFTWARE`)
<tzimmermann> but i grepped for the use of the iterator vs. merged. and merged is used more often by far IIRC
<tzimmermann> i guess that everyone simply copied pre-existing code and therefore took damage_merged as well
<javierm> tzimmermann: yes, that's exactly why I'm asking
<javierm> because notice that the convention is to use the helper
<daniels> robert_mader: swrast is Special
<daniels> robert_mader: so it depends on how it gets initialised ...
<tzimmermann> javierm, i once received a patch from jfalempe that implemented iterators for mgag200. she said that it improves the performance compared to merging. since then, i consider damage_merged to be obsolete
<tzimmermann> all the hardware that uses damage_merge is at least as slow as mgag200. so it probably sees similar effects
<tzimmermann> therefore, merging damage only seems to make sense if there are several overlapping areas that would otherwise be copied multiple times.
<tzimmermann> that's something that userspace can detect more easily that the driver. so userspace should merge the damage area accordingly
<javierm> tzimmermann: got it. Then probably we should provide a helper that gets as an argument a function that handles rect damages
<javierm> and also get the old and new plane state
<javierm> tzimmermann: similar to how drm_atomic_helper_damage_merged() does but not using the whole area
<tzimmermann> javierm, i have not yet found a good helper for that. so far, all the drivers appear to be slightly different. maybe once they are all converted, a helper emerges
<javierm> tzimmermann: fair
<tzimmermann> the thing is that some, like udl and simpledrm, have a small area where the virtual primary plane can be moved around
<tzimmermann> others, such as mgag200, use the hardware's line offset/stride register to implement virtual planes
<tzimmermann> so far, it's all a bit different from each other
<javierm> tzimmermann: is the former due the usage of shadow-buffered primary planes ?
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<tzimmermann> yes
<javierm> tzimmermann: got it
<tzimmermann> but also the later
<tzimmermann> it's the way in which these virtual screen sizes are implemented
<javierm> tzimmermann: I see
<javierm> tzimmermann: Ok, let's think about a helper later then. I just wanted to understand this before looking at your patch-set in detail
<tzimmermann> sure, np
<jfalempe> tzimmermann, yes, I've seen this on mgag200, when you move the cursor on one corner, and there is an animation on the opposite corner, merging damage region is clearly not a good strategy.
<tzimmermann> haha, yes
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<javierm> tzimmermann: I'll then drop drm_atomic_helper_damage_merged() in the ssd130x driver too
<tzimmermann> ok
<javierm> I use that driver as a playground to learn more about DRM :)
<tzimmermann> :)
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<karolherbst> I was wondering why the int rotate tests don't work for int 2/3/4/8/16 (yes, int1 works, and long4 and all the other variants) and then I saw this: https://gist.githubusercontent.com/karolherbst/51595d774340f92fddb403e0821cd208/raw/b3e843f83a735f893df3b32c9c7c345a50d9f30a/gistfile1.txt
<karolherbst> ...
<karolherbst> yeah well.. if the LLVM IR is empty...
<karolherbst> heh.. instcombine kills the entire shader
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<karolherbst> uhh... some undef mess
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<marex> daniels: danvet: hi, regarding panel-simple, is it OK to pick both the panel simple yaml DT bindings and new panel description in panel-simple.c via drm-misc-next ?
<marex> sravn: ^
<marex> tzimmermann: ^
<javierm> tzimmermann: wonder if we should propose a todo.rst entry to convert all drivers that are using simple-kms...
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<javierm> tzimmermann: I guess others may disagree that doesn't add that much value and it's better to instead focusing on improving the atomic mode helpers and make them easier to be shared among drivers
<danvet> marex, I am honestly not on top of how to handle dt stuff
<danvet> iirc the process is that you need an ack from dt folks, and then merge through the subsystem tree
<danvet> robher, ^^ can clarify if I got this wrong
<marex> danvet: there is ACK from Rob already
<javierm> danvet, marex: that's my understanding as well and how I did in the past
<danvet> marex, so I /think/ the answer is you can push it all
<javierm> marex: yeah, I would just push it since you already got an ack
<robher> marex: Yes
<marex> ok, will do, thanks
<tzimmermann> javierm, most of the simplekms uses are in drivers that are maintained by noralf. he might not like it ;)
<javierm> tzimmermann: right
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<javierm> tzimmermann: did you get an answer about the need for calling drm_atomic_add_affected_planes() in drm_crtc_helper_funcs .atomic_check ?
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<tzimmermann> javierm, what exactly do you mean?
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<javierm> tzimmermann: that some drivers call it in their .atomic_check handler and you questioned that the other day and noticed that you are not doing in udl_crtc_helper_atomic_check()
<javierm> so wondered if you got to the bottom of that
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<tzimmermann> in the end, i didnt need the functionality. so i removed the call. otherwise, my solution was to override the .atomic_check callback and unconditionally add planes before calling drm_atomic_helper_check()
<javierm> tzimmermann: I see
<javierm> tzimmermann: I guess there are many drivers that also don't need that functionality but are just calling it due copy&paste from other drivers
<tzimmermann> i don't know how many drivers use it
<javierm> tzimmermann: for instance, simpledrm. Or do you need it there?
<tzimmermann> i mindlessly copied this code from the simplekms helpers
<tzimmermann> it's not necessary AFAICT and i'll remove it at some point
<javierm> tzimmermann: yes, same for me in the ssd130x driver...
<tzimmermann> haha :)
<tzimmermann> adding a plane to the atomic state without later running the plane's atomic_check appears broken anyway
<javierm> tzimmermann: indeed, maybe the check could be done in drm_atomic_add_affected_planes() itself and return an errno ?
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<tzimmermann> we legitimatelly call it from other helpers. adding atomic_check there would mess up the logic even more
<javierm> that's true
<zmike> mareko: did you have further comments on my glthread MR?
<tzimmermann> javierm, it was added in commit 6dcf0de7ef10244b17442f47956a1d9fabe2abe1
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<tzimmermann> update didn't get called. but there's little explaination, why not
<tzimmermann> and there's no comment on why non-simplekms drivers aren't affected by the bug
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<marex> btw if anyone needs their panel-simple stuff reviewed and possibly applies, let me know ;-)
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<emersion> how does one usually land a patch with both DRM core and driver pieces?
<emersion> just merge everything in the driver tree? or merge in drm-misc-next and backmerge in the driver tree or something?
<emersion> (cc danvet)
<danvet> driver tree?
<emersion> amd for instance
<danvet> ah drm driver tree
<danvet> simplest is to get acks from maintainers for merging it all through one tree (drm-misc usually, but could also be the driver tree when one driver is most involved)
<danvet> not so simple is asking drm-misc maintainers to set up a topic branch which gets pulled into all trees
<danvet> generally that's overkill
<emersion> ah, so merge the amd pieces in drm-misc-next?
<danvet> so just ask agd5f for an ack or merge all the patches for, depending what he prefers
<danvet> yeah
<emersion> cool
<emersion> vsyrjala, pq: did you have other uapi comments regarding this? https://patchwork.freedesktop.org/series/107683/
<danvet> emersion, ^^ it's a bit hard to find
<emersion> i'll re-spin the series one more time with that thread addressed, but apart from that doc change it should be good to merge
<emersion> danvet: ah, thanks
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<zmike> mareko: another idea I've been considering: how reasonable do you think it would be to add a sort of "batch readahead" utility to tc such that a driver could call something like tc_readahead(ctx, bool (*callback)(...), void *data) and gather info about pending calls?
<zmike> this would specifically be useful for tilers
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<mareko> what kind of information do you expect to get from it?
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<agd5f> emersion, ack to merge via drm-misc
<emersion> agd5f: excellent
<zmike> mareko: I'm imagining it could be used at set_framebuffer_state to check for attachment usage, e.g., determine in advance whether all attachments will be written to, find resolve attachments, that sort of thing
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<Ristovski> zmike: I'd just like to say that I appreciate your insane optimization work, keep it up
<zmike> 🙏
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<mattst88> ++
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<mattst88> it's incredible to see the progress we've made since I started in 2012 and we had like 8 intel engineers and about 3 other professionals working on Mesa :)
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<karolherbst> yeah :)
<DavidHeidelberg[m]> jekstrand: Hey, I noticed that radv-raven-traces:amd64 failed for you once in "vulkan/wsi: Refactors to pull buffer blit decisions into common code". Have you fixed the code or has the job just flaked?
* karolherbst might kick of a real CTS run for CL on radeonsi
<daniels> mattst88: srsly
<mattst88> someone should write a blog post or give an XDC talk about this :)
<karolherbst> mattst88: could be part of the last talk
<karolherbst> I think I've done all the prep work to be ready for XDC :)
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<karolherbst> "Pass 1525 Fails 0 Crashes 0 Timeouts 0: 65%|" ....
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<eric_engestrom> 🤞
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<karolherbst> I hope the only fails will be the linear filtering ones..
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<karolherbst> those are neither tested by the actual CTS run nor defined by the spec
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<eric_engestrom> "the actual cts run" == the mustpass list?
<karolherbst> yeah
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<karolherbst> though the CL CTS is more like a pythong scripts running the test binaries with various parameters
<karolherbst> *python
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<karolherbst> uhhh.... nextafter, I totoally forgot about that one
<karolherbst> yeah.... one real fail remaining to take care of
<karolherbst> nextafter is just super annoying...
<karolherbst> mhhh... that might be simple
<karolherbst> seems like in the failing cases of nextafter I get the original value back and not the next one
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<emersion> danvet: btw, is the new ALLOW_MODESET text satisfactory? https://patchwork.freedesktop.org/patch/505107/
<bl4ckb0ne> pq: for EGL those are core functions
<bl4ckb0ne> like eglTerminate
<danvet> emersion, ack
<emersion> thx
<emersion> bl4ckb0ne: where do the headers come from?
<bl4ckb0ne> EGL-Registry repo
<bl4ckb0ne> updated it with the script in bin
<bl4ckb0ne> seems to come from KHRONOS_APICALL, egl exports it as EGLAPI and gl as GL_API
<bl4ckb0ne> gl libs has all the symbols without issue, egl doesnt
<emersion> that's pretty weird…
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<bl4ckb0ne> but im not a fan of dirty workarounds
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<bl4ckb0ne> as you can see the khrplatform file got changed quite a bit, the KHRONOS_APICALL setup seems pretty old, cant even track it on the EGL-Registry git repo
<bl4ckb0ne> dates from svn
<emersion> bl4ckb0ne: what do you mean by "the script in bin"?
<emersion> there's api/Makefile
<bl4ckb0ne> the script bin/khronos-update.py to fetch all headers
<emersion> ah
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<karolherbst> okay.. I think our nextafter impl is broken for subnormals and that's what radeonsi returns... mhh
<jekstrand> DavidHeidelberg[m]: There was a double-free in the X11 WSI code. I fixed it and re-submitted.
<DavidHeidelberg[m]> jekstrand: nice, great to hear it was not a flake, but "useful failure" :D
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<jekstrand> DavidHeidelberg[m]: IDK if it was useful for me in this case. Zink also totally exploded and that's what I used to debug the issue. But it did seem to point something out, yes.
<bl4ckb0ne> emersion: https://paste.sr.ht/~bl4ckb0ne/70ed8983f9a232235de737128c515e5ddf69b04d looks like no symbols are exported at all
<DavidHeidelberg[m]> jekstrand: I seen also zink. But since it's freshly deployed, I'm looking for any flakes or issues with the job. For that case, I'm happy it didn't crashed by accident.
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<bl4ckb0ne> i think its because we have `gnu_symbol_visibility : 'hidden'` everywhere
<bl4ckb0ne> but i dont get why gl exports just fine
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<karolherbst> why are denorms...
<zmike> yes.
<karolherbst> so the last test is fixed when I enable fp32 denorms, but then other things start to fail :(
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<alyssa> relatable
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<karolherbst> ohhhhhhh
<alyssa> karolherbst: for panfrost I gave up on trying to fix denorms with rusticl and libclc
<karolherbst> the hell LVM
<karolherbst> *LLVM
<karolherbst> I just found the problem
* karolherbst smashes a trash bin
<alyssa> since the libclc you gave me is built for ftz and the CTS actually checks that
<alyssa> so..
<karolherbst> million dollar question: what's the best way to enforce flushing denorms and what does llvm just optimize away?
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<alyssa> fcanonicalize?
<alyssa> `fmul(x, 1.0)` is the definition but I thought LLVM has an instruction for it
<karolherbst> bingo :P
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<alyssa> @llvm.canonicalize.f32
* karolherbst smashes the trash bin even harder
<karolherbst> yeah sure... the question is: how to detect that.. we don't have that in nir
<karolherbst> but I suspect once we support denorms we need that
<karolherbst> for now I could check if the fmul has 1.0 as its source in nir_to_llvm
<alyssa> uh.. denorm behaviour in NIR is well specified no?
<alyssa> fcanonicalize is there as an optimization to let us do more aggressive fp opts
<karolherbst> sure, but that fmul a 1.0 is a fmul a 1.0
<karolherbst> there is?
<karolherbst> yeah.. okay
<alyssa> I don't remember what that MR is stalled on
<alyssa> but it's about perf
<karolherbst> me neither
<alyssa> you don't need it for correctness
<alyssa> and if you do, you have some other bug somewhere else.
<karolherbst> well.. I do now
<karolherbst> and that "bug "is inside LLVM
<alyssa> you have some other bug somewhere else.
<karolherbst> LLVM optimizes that way, because it's a mul and not fcanonicalize
<alyssa> that sounds like an LLVM bug then
<karolherbst> yeah.. but llvm says: use llvm.canonicalize
<karolherbst> I just need to detect that pattern in nir_to_llvm
<karolherbst> but I suspect we want to have !9254 to make that all super explicit
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<karolherbst> uhh.. how could I check if a nir source is a const again?
<zmike> nir_src_is_const?
<karolherbst> ahh thanks. I always grep for the wrong things
<zmike> too many nir functions
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<jekstrand> DavidHeidelberg[m]: :D
<karolherbst> uhm.. do we also have the same for alu sources?
<zmike> pass src.src?
<karolherbst> ahh yeah... I was just thinking of that as well..
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<DrNick> is there a fork of Mesa somewhere that reads $GAMESCOPE_LIMITER_FILE ?
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<pinchartl> marex: I'm afraid I'm sending a bit of work your way for the LCDIF driver :-)
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<karolherbst> okay.. another try
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<karolherbst> okay.. I think this is it.. going for the full run now :)
<karolherbst> I'll report back in like... 10 hours or so
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<cwabbott> karolherbst: fcanonicalize is supposed to be identical to fmul with 1.0, so if it's optimizing it out it's either (a) an llvm bug (which is pretty unlikely) or (b) you're passing too aggresive fast-math flags for opencl (more likely)
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<karolherbst> cwabbott: I don't pass any flags
<cwabbott> then track down where in llvm it's changing
<karolherbst> also it's not an llvm bug, because it states to use canonicalize
<cwabbott> it's a bug
<cwabbott> no, it most definitely does not
<cwabbott> maybe for performance
<karolherbst> some LLVM dev told me, that LLVM is right to optimize that mul away
<cwabbott> uhh, I feel like I'm missing context because that's wrong
<cwabbott> or you misunderstood them
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<karolherbst> nope
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<karolherbst> there isn't really much to missunderstand
<cwabbott> they're literally defined in the llvm manual as identical
<karolherbst> so in nir we insert fmul a 1.0 to force flushing denorms
<cwabbott> find where it eliminates the fmul and raise a bug/PR
<karolherbst> "This function should always be implementable as multiplication by 1.0, provided that the compiler does not constant fold the operation."
<karolherbst> from the docs it sounds like that llvm.canonicalize is special
<karolherbst> especially the last part
<cwabbott> listen, I worked on this for a while for amdgpu and I 100% can guarantee that if you pass the right flags and do the right incantations then denorms *have* to be respected (or not respected)
<cwabbott> *(or flushed)
<karolherbst> sure, but radeonsi is passing the flags, and they seem correct
<cwabbott> pattern-matching mul by 1.0 and turning it into fcanonicalize is not correct, it's just masking a bug elsewhere
<karolherbst> attributes #0 = { "amdgpu-32bit-address-high-bits"="0xffff8000" "amdgpu-flat-work-group-size"="512,512" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "target-features"="+DumpCode" }
<cwabbott> what happens if llvm optimizes something to 1.0 itself?
<karolherbst> I don't use the fp in float operations
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<karolherbst> that's the problem
<cwabbott> ?
<karolherbst> the fmul a 1.0 is the only fp op
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<cwabbott> you mean, it's the only floating-point operation in the shader?
<karolherbst> more or less, yes
<cwabbott> ok, then you need to track down which llvm pass is changing it
<cwabbott> usually that involves dumping the text and then compiling it with llc, although I haven't done it in a while
<cwabbott> I can assure you there is no "eliminate fmul 1.0 a unconditionally" optimization, it is more subtle than that and you are probably messing something else up
<cwabbott> and anyway, the point I was trying to make with "what happens if llvm optimizes something to 1.0 itself?" is not about this particular shader
<karolherbst> yeah.. I get that, but the flags to llvm seem to be correct and I didn't mess with them anyway
<karolherbst> it's all radeonsi doing
<cwabbott> it's that it's not Correct (tm) and in compilers being Correct (tm) is the only way to stay sane
<karolherbst> sure
<karolherbst> anyway.. I posted what the AMD_DEBUG thing starts printing with the llvm stuff above and those seem to be correct at leat from my perspective
<karolherbst> maybe it's missing a tiny bit? dunno
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<cwabbott> again, copy the entire shader AMD_DEBUG prints out into a file and compile it with llc from your llvm build, use the llc flags to dump out what happens between each pass, find out which pass does the problematic thing, find out why it's doing it
<cwabbott> I guarantee you it's a problem with *something* you're doing if the shader really is that simple
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<karolherbst> again, I am not doing anything here
<cwabbott> be methodical about tracking down what's going on
<karolherbst> if this is a bug, then radeonsi is hitting it already today
<cwabbott> yes, sure
<cwabbott> then fix the bug!
<karolherbst> though for GL it might just not matter
<cwabbott> yes, for GL it won't matter
<cwabbott> only VK with shader_float_controls or CL
<karolherbst> anyway.. this has to wait until after XDC.. but I can see that llvm might be confused by the sorounding bitcasts or whatever
<cwabbott> I feel like I should save this rant somewhere https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10728#note_922069
<cwabbott> keep running into people doing the same mistakes
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<marex> pinchartl: that's no problem, I have space in the todo list
<pinchartl> :-)
<pinchartl> I've briefly explained the issue by e-mail, please let me know if you need additional information
<Kayden> mareko: hey, could you explain a bit of code in tc_improve_buffer_map_flags? looking at https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/gallium/auxiliary/util/u_threaded_context.c#L2238
<Kayden> mareko: I don't understand why UNSYNCHRONIZED or PERSISTENT are removing PIPE_MAP_DISCARD_RANGE
<Kayden> mareko: in my mind, DISCARD_RANGE just means "I don't care about the contents of the destination memory" which also implies "I will not read the destination memory"
<Kayden> but there's a difference between e.g. MapBufferRange with WRITE that may do -partial- writes of the data, and e.g. BufferSubData which is definitely going to write the entire specified range so the contents no longer matter
<marex> pinchartl: is that some HW race ?
<pinchartl> no, it's a software issue only
<pinchartl> I *think* the issue comes from the fact that the CRTC is enabled without a plane
<pinchartl> but I haven't double-checked that
<pinchartl> in any case, the format and stride programmed in .atomic_enable() are not the right values, the next .atomic_update() for the plane has an fb with a different format and stride
<pinchartl> so the format and stride need to be programmed in .atomic_update() (or possible .atomic_flush())
<pinchartl> *possibly
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<marex> pinchartl: ah ... both of those changes were required as part of the intial driver review I think
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<pinchartl> marex: it seems that the offending structure was copied from the mxsfb driver
<marex> pinchartl: the whole lcdif was originally just a couple of tweaks to mxsfb really
<marex> pinchartl: I am still convinced the lcdifv3 is really mxsfb lcdif behind the scenes
<marex> pinchartl: it just seems like nxp is vehemently denying it
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