<bamse>
CosmicPenguin: isn't the problem that the hardware has the clock prepared but the selected parent is not ticking?
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<krzk>
CosmicPenguin: bamse: I have the same for dispcc on sm8750. Both are not allowed: setting parent and setting rate, while parent (the DSI PHY PLL) is disabled and the DSI PHY PLL itself is not configured. This is kind of logical, if you think about it, but kernel infrastructure, including assigned-clock-parents, is not ready for that, I think.
<krzk>
CosmicPenguin: so the history is that no one implemented this because mostly things were working :/
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<CosmicPenguin>
bamse, krzk: preparing it first went from a "rcg didn't update its configuration" warning to a watchdog reset. Starting to feel that parent not ticking is a strong possibility
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<bamse>
CosmicPenguin: is that with clk_ignore_unused?
<CosmicPenguin>
bamse: hmm - no its not. That might be a good idea
<bamse>
CosmicPenguin: does the problem appear after the kernel has fiddled with the associated gdsc(s)?
<CosmicPenguin>
bamse: yeah, I believe so
<bamse>
CosmicPenguin: so perhaps not using pd_ignore_unused either then?
<CosmicPenguin>
nope, let me toss both of those in
<bamse>
CosmicPenguin: looking at cam_cc_slow_ahb_clk_src, it used clk_rcg2_ops...if you use clk_rcg2_shared_ops instead, the kernel will make an attempt to park the clock tree on tcxo when we're disabling some of the things
<bamse>
so i believe that's more or less what enable_safe_config did (might remember wrong though)
<CosmicPenguin>
yeah, that is pretty much what enable_safe_config does - that run configure during enable instead of set_rate
<CosmicPenguin>
s/that/that and/
<CosmicPenguin>
ah, yeah, I see shared ops is used on similar camcc targets
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<CosmicPenguin>
bamse: I am very pleased to report that was indeed the solution. Do you want a patch for sm8250?
<bamse>
CosmicPenguin: makes it look like the other platforms? if so that sounds very reasonable and i'd merge that patch