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<gediz0x539> megi: hi, is it still necessary to append "fw_devlink=permissive" to bootargs after applying "of: property: fw_devlink: Support allwinner,sram links" patch on 5.13?
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<hlauer> I have a small patch to A20 i2c controller at https://bitbucket.org/hlauer/kernel/src/master/patches/i2c-buslock.patchl,
<hlauer> which will dump the register contaning the state of SCL/SDA when i2c is locked. Any suggestions for ifdefs needed to include into kernel code?
<apritzel> hlauer: ifdefs? for what? #ifdef's in C files are highly frowned upon in Linux
<hlauer> I have no idea if the original hardware have this register. What's the preferred way then?
<apritzel> but then an ifdef won't solve this, because the same driver can run on Allwinner and the original Marvell controller
<megi> gediz0x539: you don't need to apply anything anymore
<apritzel> hlauer: I guess this should go through mv64xxx_i2c_regs_sun4i then?
<apritzel> hlauer: you could try to contact the driver maintainer or people with access to Armada datasheets, to find the LCR register there
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<gediz0x539> megi: since 5.14?
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<hlauer> apritzel: will look into mv64xxx_i2c_regs_sun4i then. Thanks for the hint
<apritzel> hlauer: it's a bit nasty for this kind of debug patch to add more code to filter for Allwinner vs. Marvell, so if you can find the LCR register address in the Armadas, that would be much cleaner
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<MoeIcenowy> apritzel: BTW I have some leaked document of the original IP core
<MoeIcenowy> the register map of Allwinner one is the original
<MoeIcenowy> and the Marvell one is shuffled
<apritzel> lol
<apritzel> MoeIcenowy: can you check where the LCR register is for Marvell? it's 0x20 for Allwinner, apparently
<MoeIcenowy> I have no Marvell manual
<MoeIcenowy> but I think Marvell document should be somewhere
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<apritzel> mripard: I guess Bootlin guys have Marvell Armada manuals? To check the I2C controller register map? Can you name a contact to ask about this?
<mripard> I think there was a few links to datasheet in the kernel doc?
<mripard> otherwise paul might help, but he doesn't seem to be around since the Freenode Exodus
<apritzel> mripard: ah, many thanks! did
<apritzel> didn't know they were available, I was somehow under the impression that Marvell SoC docs were hard to come by ...
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<megi> gediz0x539: 5.13
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<apritzel> hlauer: I scanned most of the Marvell documents mripard linked above, but none of them mention an LCR register :-(
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<hlauer> apritzel,mripard: Many thanks for looking. So LCR (meaning somthing like LineControlRegister) is probably A20 specific
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<apritzel> looks like it, but it's probably Allwinner specific, not only A20 (I see it on later SoCs as well)
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