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<smaeul> MoeIcenowy: the existing core power-up sequence matches the A53 TRM (the second half of "Individual core shutdown mode"). maybe the output clamps are released too soon after power is applied? try adding a 10us delay after each write to SUNXI_CPU_POWER_CLAMP_REG (this matches the BSP)
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<MoeIcenowy> smaeul: thanks
<MoeIcenowy> smaeul: the delay makes it work
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