ChanServ changed the topic of #linux-sunxi to: Allwinner/sunxi development - Did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait for an answer! - This channel is logged at https://oftc.irclog.whitequark.org/linux-sunxi
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<macromorgan> okay, I'll test it tomorrow
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<MasterR3C0RD> Somehow I still can't get the DRAM initializing, even after a re-port. Double checked timings, magic values, got the PMIC up, and still no dice. Perhaps someone with more knowledge on DRAM init might know; essentially dfistat's dfi_init_complete/bit 0 never asserts, no matter how long I'm waiting on it. I've confirmed at this point that aside from offsets and a magic register location everything seems to match H616
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<dsimic> apritzel: thanks for the clarifications!
<dsimic> having no EULA is a good point... IRC, when it comes to legally enforcing something, you've got to prove that someone actually explicitly agreed on something first, before accessing or using something
<dsimic> s/IRC/IIRC/
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<apritzel> MasterR3C0RD: are you using the correct DRAM parameters? That wouldn't be in any .a or .o files, but they are provided specifically for each board, and passed in via a pointer to some struct
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<MasterR3C0RD> apritzel: If you mean the MRs/TPRs, I've set those up; I got those from the dram config struct that gets passed into init_DRAM, and they're just about the same as the params in sys_config.fex. If you mean timings, it calculates those from the frequency and some flags in tpr13 and tpr10
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<apritzel> MasterR3C0RD: ah OK, that's covered then, just wanted to check
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<macromorgan> I'm trying to pick up the D1 pwm pieces (I don't have a D1 to test with, but I do have a similar H700)... is the consensus then that we won't allow duty cycle to change once set and enabled, or will we allow it to be changed (possibly causing a flicker)?
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<iscle> MasterR3C0RD: Can you send the ghidra file and reversed code, or open a ghidra server so that everybody gets a chance to spot the issue? haha
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<iscle> BTW, for those following the USB DMA controller saga, I'm now using a T113-s3 board which has 2 USB-C ports and an SD-Card in order to test host mode and also high speed bulk transactions
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<MasterR3C0RD> (Guest5922 is me)
<iscle> I can confirm that USB DMA as USB gadget works! I created a usb gadget with 1GB file, formatted it as ext4, copied an entire breaking bad episode (1080p, episode is amost 800MB), and it copied just fine without any cpu usage, and it's now playing just fine with instant scrubbing with 0% cpu!
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<apritzel> iscle: nice one, well done!
<apritzel> if you get any chance, can you repeat this with mainline, to get a baseline? Both in terms of CPU usage and maybe read/write performance?
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<iscle> apritzel: do you know any tool i can use to measure the performance? right now i just used nautilus to copy the files which does not even give the speed
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<apritzel> I often use "hdparm -t /dev/sdX", as a crude, but simple benchmark for block devices
<apritzel> you could also play around with: time (cp src /dev/shm/foo; sync), but that would be subject to the block cache, so only works on the first run, I guess
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<iscle> It's a bit inconsistent with hdparm
<iscle> First run: Timing buffered disk reads: 30 MB in 3.04 seconds = 9.88 MB/sec
<iscle> Second run: Timing buffered disk reads: 50 MB in 3.17 seconds = 15.79 MB/sec
<iscle> Third run: Timing buffered disk reads: 60 MB in 3.02 seconds = 19.84 MB/sec
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<iscle> dd /dev/random write: 1048576000 bytes (1,0 GB, 1000 MiB) copied, 103,157 s, 10,2 MB/s
<iscle> It's probably getting bottlenecked by the SD card or mmc controller or something
<iscle> I also have an H618 board with 1GB RAM, I can probably try it with a ram drive on that
<iscle> dd read: 1073741824 bytes (1,1 GB, 1,0 GiB) copied, 99,7681 s, 10,8 MB/s
<iscle> With top, I can see CPU usage is always 0% (average last 5 minutes is 0.5%) and IO does go up to something like 60% or so
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<apritzel> can you create a sparse file on tmpfs (dd if=/dev/zero of=/dev/shm/sparse.bin bs=1M seek=2000 count=0), and serve that via UMS?
<apritzel> and yes, SD cards on all mainline AW boards so far are limited to 23-25MB/s (SD High Speed)
<apritzel> (this can be improved on H616 and A523, but that's another story)
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<iscle> With the sparse file on tmpfs: Timing buffered disk reads: 76 MB in 3.01 seconds = 25.25 MB/sec