ChanServ changed the topic of #msm8937-mainline to: Boot Linux on your MSM8917/37/40 and QM215 mobile! | GitHub: https://github.com/msm89x7-mainline | Logs: https://oftc.irclog.whitequark.org/msm8937-mainline | Bridged to #msm8937-mainline:kde.org on Matrix
<FieryFlames[m]> <barni2000[m]> " imu@68 {..." <- > <@barni2000:matrix.org> ```... (full message at <https://matrix.org/_matrix/media/v3/download/matrix.org/agQiEZPxgfvUMOXDcTMPQaTT>)
<FieryFlames[m]> I already tried bmi160 at 68, not there
<FieryFlames[m]> 1a is moto's dsp
<FieryFlames[m]> bmi160 is on spi
<hacker420[m]> <barni2000[m]> "because we are using temp hack..." <- yeah I saw that update
<hacker420[m]> but does it change anything functionality wise?
<jojo_autoboy[m]> i'd doubt it if the commit in mesa to properly enable it was a single line of code
<hacker420[m]> yeah
<hacker420[m]> probably just for the sake of clarifying it
<FieryFlames[m]> I tried to set up spi for bmi160, and also tried to add bmp280 and now it won't boot :(
<FieryFlames[m]> even after commenting out the dt nodes
<jojo_autoboy[m]> yikes
<FieryFlames[m]> not bricked I can get to lk2nd something just isn't happy in the kernel
<barni2000[m]> <jojo_autoboy[m]> "i'd doubt it if the commit in..." <- it is enough because 506 was enabled before and the configs are same
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<barni2000[m]> Good news interconnect is upstreamed by aka_
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<hacker420[m]> nice
<hacker420[m]> now to figure out 8 core stability
<barni2000[m]> Llmited freqs are working i have updated the opps
<hacker420[m]> with all 8 cores?
<hacker420[m]> is this some new commit?
<barni2000[m]> Yes
<hacker420[m]> previously I remember limiting it didn't work
<hacker420[m]> ah
<barni2000[m]> It is not rebooting so works
<barni2000[m]> You had issues wit vol ley
<barni2000[m]> s/wit/with/
<hacker420[m]> already fixed
<barni2000[m]> s/wit/with/, s/ley/key/
<hacker420[m]> wrong gpio
<hacker420[m]> pulled the 8937 dtsi, checking...
<hacker420[m]> do I need this too?
<hacker420[m]> though guess that was already in your branch
<hacker420[m]> yeah booted with all 8 coresa
<hacker420[m]> hm
<hacker420[m]> phosh didn't start
<hacker420[m]> stil some weirdness
<hacker420[m]> 4 cores works still
<hacker420[m]> rechecking...
<hacker420[m]> rebooted
<hacker420[m]> panics somewhere
<hacker420[m]> tried 6 cores
<hacker420[m]> undefined instruction
<hacker420[m]> let me try to recompile fresh lk2nd
<hacker420[m]> 8916 lk2nd
<hacker420[m]> nope panics still
<hacker420[m]> might try pulling your whole new branch tomorrow
<barni2000[m]> <hacker420[m]> "https://github.com/msm89x7-..."; <- This just some debug prints for a53pll driver and adreno hacks
<barni2000[m]> <hacker420[m]> "nope panics still" <- I will install rootfs for land tomorrow
<barni2000[m]> I am not sure in cci part
<barni2000[m]> It also needs an opp
<barni2000[m]> Why 8940 is fine?
<barni2000[m]> They are using the same cpufreq definitions only the freqs are lower on 8937
<barni2000[m]> If you see something in downstream what is missing in mainline let me know
<barni2000[m]> Maybe try to set cci from 533mhz to 400mhz
<hacker420[m]> hm
<hacker420[m]> clock is already at 400
<barni2000[m]> Not this
<barni2000[m]> Or you can try comment it out and disable apcs2 node
<barni2000[m]> There are 2 different cci one of them is related to the camera the other is for the cache
<hacker420[m]> like this?
<barni2000[m]> Yes
<hacker420[m]> let me do a quick test
<hacker420[m]> still dies
<barni2000[m]> Sad
<barni2000[m]> What happens if you comment it out? Also comment out the apcs2 node
<hacker420[m]> can't test atm
<barni2000[m]> Ok no rush
<hacker420[m]> barni2000[m]: ```
<hacker420[m]> ERROR: Input tree has errors, aborting (use -f to force output)
<hacker420[m]> ...(truncated)
<barni2000[m]> I mean just the apcs2 part
<barni2000[m]> In apcs1
<barni2000[m]> assigned properties+the apcs2 node
<Shigenta[m]> barni2000: saw you made a 6.10 branch in msm89x7-mainline/linux
<Shigenta[m]> how much time till mainline is merged in pmaports?
<barni2000[m]> I can make an MR for testing but we have not got stable branch for 6.10
<barni2000[m]> <Shigenta[m]> "how much time till mainline is..." <- I have work on it on my free time
<hacker420[m]> <barni2000[m]> "I can make an MR for testing but..." <- I'd say wait until 8 cores are stable
<barni2000[m]> maybe only cedric is affected but i will investigate more tomorrow
<barni2000[m]> i think i should investigate cci (cache coherent interconnect) more