ChanServ changed the topic of #panfrost to: Panfrost - FLOSS Mali Midgard + Bifrost + Valhall - Logs https://oftc.irclog.whitequark.org/panfrost - I don't know anything about WSI. That's my story and I'm sticking to it.
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<rah> is there any effort to support the 3rd gen Valhall, for example in the G610 MP4 in the Rockchip RK3588 SoC?
<alyssa> work on this is well underway :)
<alyssa> rah: ^
<alyssa> the challenge is that it requires an (almost) completely different kernel driver
<rah> :-/
<alyssa> compared to everything from first gen Midgard thru second gen Valhall (10+ years of Malis which were all basically the same from the kernel's pov)
<alyssa> anyway, we've been working hard on that, hopefully that'll be ready for testing in the coming months, but no promises
<rah> OK
<rah> useful driver by the end of the year?
<alyssa> end of 2023? almost certainly.
<rah> great, thanks
<alyssa> I *expect* I'll be working on RK3588 full time starting in May
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<rah> cool
<alyssa> and then.. Vulkan
<alyssa> at a hw level, G610 should able to support Vulkan in a sane/efficient way
<alyssa> so that makes panvk 2.0 a lot more interesting :)
<alyssa> ^ first MR merged towards v10 ("3rd gen Valhall") support
<rah> great
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<q4a> alyssa: I tried to make simple change from:
<q4a> `bi_index scale = bi_fma_rscale_f32(b, s0, log2_base, bi_negzero(), bi_imm_u32(24), BI_SPECIAL_NONE);`
<q4a> to: `bi_index scale = bi_fma_rscale_f32(b, s0, log2_base, bi_negzero(), bi_byte(va_lut(14), 0), BI_SPECIAL_NONE);`
<q4a> But got error:
<q4a> Invalid swizzle: r0 = FMA_RSCALE.f32 ^r0, u264, u256.neg, ^r1.b0
<q4a> run: ../src/panfrost/bifrost/valhall/va_pack.c:52: invalid_instruction: Assertion `!"Invalid instruction"' failed.
<q4a> That's because it expect 32bit value, but I give 8bit value?Y
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