ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<maz> sven: I wonder what this Intel guy is on about...
<sven> i think he dislikes that i have to attach a device to a domain and then maybe detach it directly afterwards which, to be fair, is awkward.
<sven> and that's required because before attaching the first device to an empty domain i might have no idea what the actual i/o pagesize(s) will be. and that's really caused by the original design decision that a single bus can only have a single iommu type.
<sven> apple had a previous iphone SoC where there were some DARTs that could only do 4k pages and other that could only to 16k pages on the same bus
<sven> and i think arm's smmu also only decides the actual pagesize after the first device is attached, but i'd have to read that code again to confirm that
<maz> sven: sure, the domain part is a bit of a quirk. but keeping the status quo of "the driver knows better" is counter productive.
<sven> yeah, agreed
<sven> imho this has to happen on the iommu level and not the driver level
<maz> I guess that x86 IOMMU is still stuck outside of the iommu framework.
<sven> could be. i know that the drivers for those are surprisingly complex
<maz> yeah, and they have ugly hooks in things like GPU drivers.
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<j_ey> sven: .pgsize_bitmap = -1UL, /* Restricted during device attach */
<j_ey> from drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
<sven> ah, yes. but anyway, if the only complaint is about that attach-check-detach quirk in the end i can work around that. either i just introduce something like get_pgsize_for_dev to the iommu driver ops or i just limit the DART driver to 16k for now and kick the issue down the road if apple ever decides to bring back 4k DARTs
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<alyssa> Sorry for the mailbox issue. I've reverted the offending commit
<alyssa> Pushed 20211022
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<sven> kettenis: i think BIT(31) in DART_PARAMS1 is set when the DART can do region protection
<sven> still haven't tested for the pcie darts though
<kettenis> sven: same here; still polishing my wifi diff
<sven> kettenis: i just tested it with a bit of a hack: i only cleared BIT(1) in the PTE and i got the "region protection" exception
<sven> so i think it should work with those as well
<sven> (region protection failure is BIT(7) in the error register)
<kettenis> cool
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<jeffmiw> alyssa: thanks, mu-one branch 20211022 boots now without the mailbox issue.
<jeffmiw> I have a mba, is there anything you need to be tested with this branch ?
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<alyssa> er does 20211022 boot on mba?
<alyssa> that's nice. I forgot if I fixed the mba issues.
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<jeffmiw> yes it does
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<alyssa> woo :-)
<alyssa> sven: let me know when you have an updated mailbox patch to apply btw
<alyssa> though I guess I might as well just wait for it to show up in linux-next
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