<kettenis>
looks like that's the SD card controller
<kettenis>
should be standard SDHC
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<alyssa>
marcan: hilarious
<marcan>
kettenis: yeah, the SD is just pcie
<alyssa>
which machine has an SD card?
<alyssa>
the new mbps?
<alyssa>
ar: they sure are trying
<kettenis>
alyssa: yes
<alyssa>
ah
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<arnd>
marcan: how many different instruction sets in those 15 coprocessors? The highest I'm aware of on that scale was Snapdragon, but I forget the exact number that I was told
<alyssa>
snapdragon dsp was wacky iirc
<alyssa>
also, do you count AGX? what about the ANE?
<sven>
i think most of them are just arm64 cores
<sven>
dcp, ans and smc definitely are
<alyssa>
agx too, funnily
<alyssa>
iirc
<sven>
i also finally got around to figure out how this DART subpage protection works: there's still some weirdness but afaict you clear BIT(1) in the PTE to enable it and then bits 63,52 are the start and 51,40 the end offset>>2 inside the page that's allowed. any access outside that range will just be blocked
<alyssa>
fun
<alyssa>
do we ever need to use that on linux?
<sven>
maybe, it would allow us to skip swiotlb entirely if this can be hooked up in a sane way to the iommu subsystem
<sven>
might make sense if it's much faster
<alyssa>
nod
<alyssa>
OD
<alyssa>
i miss working on the asahi mesa driver
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<kettenis>
sven: does that work on all the DARTs?
<sven>
kettenis: not sure yet
<sven>
it works on the usb ones and on the audio/aes/whatever (dart-sio)
<sven>
still have to test the pcie ones
<sven>
but if you want a simple test: just setup the range to only the first 0x10 bytes of a page and then trigger a DMA request with more than 0x10 bytes
<sven>
it'll trigger an error interrupt and the fault address with be 0x10 bytes into the page
<kettenis>
just figured out why the wifi wasn't working for me in OpenBSD
<kettenis>
so I'll look into that later today or tomorrow
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<marcan>
arnd: 2
<marcan>
there's some cortex-m3s (ARMv7-M) and some chinooks (ARMv8-A).
<marcan>
though that's not counting the DCP m3s
<marcan>
that adds another 5 v7-Ms :p
<marcan>
so we're up to 20 copros on the Max, at *least*
<arnd>
ah, so you are not even counting the ARC cores in the XHCI then
<marcan>
are those a thing?
<marcan>
dwc3 uses ARC?
<arnd>
I haven't seen a confirmation for those, but I'm pretty sure that any XHCI needs to have firmware running on some MCU, and ARC is what Designware tends to use because they ownit
<marcan>
I don't think I've seen any indication of dynamically loaded firmware for those
<arnd>
no, I don't think they do that, maybe some maskrom inside the dwc3 block though
<marcan>
yeah, could be
<marcan>
but hey, RMS doesn't count that either
<marcan>
"it's hardware!"
<marcan>
"this bluetooth dongle with half a megabyte of proprietary stack in ROM Respects Your Freedom!"
<alyssa>
marcan: well as long as the cpu doesn't touch the scary proprietary firmware i guess it's ok
<arnd>
xhci-tegra and xhci-rcar call request_firmware()
<marcan>
I wonder though, if Apple had any visibility into this they would've probably insisted it be SRAM and part of their secureboot
<marcan>
I know most xHCI controllers are complex enough to need firmware
<marcan>
though I *guess* you could state machine everything in principle
<marcan>
though in the end you'd probably end up with some CPU-looking things either way
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<jeffmiw>
alyssa: using your mu-one/20211018 branch, I'm getting an early kernel crash "Unable to handle kernel NULL pointer" in mbox_request_channel during dcp_platform_probe/rtkit_init. Before digging into it, just want to check if it is known.
<jeffmiw>
I'm on mba
<jeffmiw>
2021015 branch was booting fine
<j_ey>
jeffmiw: you need to modify the mboxes in the device tree
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<j_ey>
at least that's what im guessing it is, from: mboxes = <&foo>; to mboxes = <&foo 0>;
<jeffmiw>
j_ey: thanks, that rings some bell, let me give it a try
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<jeffmiw>
it seems it needs more than that or I screwed it. I'll spend more time on it tomorrow.
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