ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<kettenis> marcan: we should discuss pmu device tree bindings
<marcan> yeah
<marcan> let me grab some dinner first though :)
<kettenis> (streaming sessions don't work too well for that)
<kettenis> (and yes have some food first)
<j`ey> marcan: glad you didnt have to retype all your work
<_jannau_> marcan: when you recreate the asahi branch the next time please add the two fixups from https://github.com/jannau/linux/commits/bits/090-spi-hid to bits/090-spi-hid
<marcan> will do in a bit, after dinner
<marcan> I want to split off the SMC stuff for maz too
<_jannau_> povik might have some audio fixes too which could be integrated
<j`ey> marcan: btw did rtc work after fixing the address?
<marcan> no
<marcan> at least not with the right date
<marcan> I need to look into how apple's driver handles discrepancies; it's supposedly one driver but it might just have a big table or something
<marcan> just want to make sure we don't miss some obvious forward-compat mechanism
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<marcan> kettenis: ok, so the magic SPMI register is actually the info-leg_scrpad offset from the ADT, plus 0xf
<marcan> and the RTC also moved which is why it didn't work for me
<kettenis> yes indeed
<marcan> so clearly this needs to be a bunch of child nodes of the PMU regmap with base offsets
<kettenis> so the way this implemented now is that you have a base driver which really only provides the regmap
<marcan> yeah
<kettenis> that appears to be future-proof
<kettenis> so the question is if we can create sub-drivers that are somewhat future-proof
<kettenis> which works best if there are limited in scope
<marcan> yes
<marcan> it seems apple does it all in one big kext and I don't even see the hardware name strings anywhere
<marcan> so at least for n=2 platforms, it looks like it should be future-proof
<marcan> register bases just moved
<kettenis> would a simple "reg" property be sufficient for the subnodes?
<marcan> I'd think so
<kettenis> so the RTC could simply be an "apple,pmu-rtc" node
<kettenis> we'd probably still want to keep a scheme with two compatibles
<kettenis> at least for the top node
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<kettenis> so "apple,sera-pmu", "apple,pmu" for the m1 machines
<kettenis> and "apple,maverick-pmu", "apple,pmu" for the m1 pro/max machines?
<kettenis> the PMU is a separate chip isn't it?
<marcan> yes
<marcan> actually there's two of them
<marcan> a master and a slave
<kettenis> but the slave can't be accessed directly from the AP I guess?
<marcan> it can
<marcan> it's on another spmi bus
<marcan> I have that node commented out right now
<marcan> there's more things too
<marcan> multiple CLVRs for the main compute power rails
<marcan> and "Viper" which is the 1.8V regulator
<kettenis> so those would become subnodes I suppose?
<kettenis> and we may need them to do better power management I suppose?
<marcan> I think for the *most* part we probably don't need to use them
<marcan> but those wouldn't be subnodes anyway
<marcan> not of the PMU
<marcan> they'd be subnodes of the SPMI controller
<marcan> the CLVRs are on separate SPMI buses
<kettenis> oh, they're different chips sitting on the SPMI bus
<marcan> yes
<kettenis> I suspect some of that is managed by the SMC and DCP
<marcan> on m1pro machines there's two Mavericks, one Viper (with multiple buck controllers controlled by it), and three Monacos (CLVRs)
<marcan> the CLVRs are autonomously managed by, I'm guessing, logic in PMGR for one
<marcan> since they need to be poked for DVFS
<kettenis> And we probably should not add the SPMI controllers that are used by the coprocessors to the device tree
<marcan> apple has them in the adt, I think it might actually be a multi-master thing?
<kettenis> my understanding of SPMI is very limited ;)
<marcan> it does support multiple masters, and they well might implement multiple logical masters over one set of pins for this purpose
<marcan> fwiw, qcom-spmi-pmic.c does much the same thing
<marcan> just has a list of supported devices and reads a device ID, but other than that, it's just the regmap
<marcan> annoyingly, they decided to name the config CONFIG_MFD_SPMI_PMIC
<marcan> who do they think they are, claining they're the only MFD SPMI PMICs :p
<marcan> *claiming
<kettenis> :D
<marcan> fwiw, it seems these chips are by Dialog, but I can't find any references to public SPMI PMUs by them
<marcan> they do have some public datasheets but at least the RTC doesn't match
<kettenis> the way the RTC works is a bit strange; bet Apple had a huge finger in the design of that part
<marcan> yeah
<marcan> honestly though, I don't think macOS does much with the PMU
<marcan> it's mostly RTC, a few scratchpad/etc registers for boot/shutdown mode, and that's about it I think?
<marcan> fault detection/etc? but those could just come from scratchpad regs since presumably faults cause the system to shut down
<marcan> oh also, these things run firmware
<marcan> they have a cortex-m0 or something
<marcan> I think iBoot1 loads that on startup
<kettenis> so doing the rtc and "bootmode scratchpad" would be enough for now
<marcan> yeah
<marcan> and actually I have some suspicion the RTC is also accessible via SMC? not sure
<marcan> all the PMU voltage measurements are, and all the temperatures/etc connected to the PMUs
<marcan> #400: CLKM = (hex_, 0x94) 9e 0d 63 11 00 00
<marcan> isn't the RTC counter 6 bytes too?
<marcan> there's CLWK which is presumably the wakeup alarm
<kettenis> the j314 ADT mentions CLKM
<kettenis> but the j293 ADT doesn't
<marcan> oh, indeed
<marcan> both have it though
<kettenis> hmm, the layout of the RTC registersers is different
<marcan> on the two machines?
<marcan> there's the rtc and the scratchpad, as separate sections
<kettenis> so a simple base wouldn't work
<marcan> so that would be two reg blocks
<kettenis> info-rtc = 5126 / 0x1406
<kettenis> info-rtc_scrpad = 5137 / 0x1411
<kettenis> and
<marcan> yes
<marcan> so it would be two reg spans
<kettenis> ok, that would work
<marcan> I think we're pretty much on the same page here; tomorrow I'll clean up the existing code and bindings and see how that goes?
<kettenis> yup
<marcan> cool
<kettenis> theo has an m1 macbook air now
<kettenis> so I have to be a little bit more careful with breaking stuff ;)
<marcan> :)
<kettenis> but I think I can transition to new bindings in this area without too much disruption
<kettenis> (he's starting to look at suspend/resume, starting with creating a better way to hook that functionality up in a machine-independent way)
<kettenis> (currently it is all ACPI-specific)
<marcan> yeah... we need PSCI but without privilege mode changes for one... which is a whole bike shed to paint with the kernel folks too
<kettenis> tying this to EFI would restrict the paint colors somewhat
<kettenis> but I think you don't want to tie this to efi
<arnd> marcan, kettenis: I don't have a reference, but when ardb said how he'd recommend doing it with EFI, it all seemed rather sensible to me
<marcan> IIRC the story was that every other ARM platform uses PSCI
<arnd> I meant implementing PSCI through a UEFI service
<marcan> ah
<marcan> that works except it means then this logic needs to be in u-boot, not m1n1, or we need yet another interface there
<marcan> not that that would be a showstopper
<arnd> there are apparently multiple ways that UEFI has for providing services to the OS, and ardb had a clear recommendation which one of those it should be, but I don't remember what that was
<kettenis> and you'd lose the functionality if you booted straight from m1n1
<marcan> yeah, though if this is just for sleep and CPU power control I think I can live with that
<marcan> I expect users to use u-boot anyway
<marcan> direct boot is more for testing
<kettenis> having m1n1 scribble something into the device tree and making u-boot turn that into the appropriate EFI table shouldn't be too difficult
<marcan> you mean like having the actual code live in m1n1?
<kettenis> right
<marcan> we could do that, yeah
<kettenis> we just have to make sure the assumptions on things like the MMU state and interrupts match what ardb was thinking about for the UEFI interface
<marcan> yeah
<marcan> we don't need interrupts I think
<arnd> I just asked ardb to join this channel, not sure if he's around.
<marcan> m1n1 doesn't use them at all
<marcan> and m1n1 can run with the MMU off or otherwise expects a 1:1 mapping of its code
<marcan> but we could silo off a chunk of resident code that could have fewer requirements
<marcan> then ultimately it'd just be something like passing a PSCI entrypoint and some description of reserved memory ranges to u-boot
<marcan> and it could wrap it in EFI
<kettenis> so EFI already provides a way to mark resident code in its memory map
<marcan> right
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<marcan> tangentially, I was also thinking about m1n1 chainloads, and how we might need to shave a versioning yak there
<marcan> because if we start chainloading m1n1 so that distro packages can update it, we also need to make sure distro packages don't *downgrade* it
<marcan> since for new machine support / old distros you definitely want whatever version is installed initially to stay until the distro catches up
<marcan> ha
<marcan> nice
<kettenis> arnd: thanks, I'll have a look at that
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<marcan> well that certainly looks reasonable
<arnd> ardb says he has trouble joining oftc.net at the moment, but he's on libera.chat/#armlinux
<marcan> kettenis: incidentally, I should be putting out a progress report soon, so if you want to write up a blurb on u-boot/openbsd... :)
<kettenis> let me see if I can join there
<kettenis> heh, yes, I need to write something up
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<jannau> kettenis: broken keyboard is caused by status = "ok"; in the t600x linux device tree
<jannau> annoying that didn't spot that when I compared it to the u-boot t8103 device tree
<kettenis> heh, I overlooked that as well
<kettenis> does it need that patch I pushed yesterday?
<kettenis> or does it work without?
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<jannau> kettenis: it works without 32a7c5787aec7a458aa91c490893b0908e11b573
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<kettenis> jannau: thanks, I'll drop that bit for now then
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<kettenis> so the only thing I need to do is add the compatible for the DART isn't it?
<jannau> you also need the mem layout to not crash as soon as something is loaded
<kettenis> shall I pull those into my tree and submit them upstream as a series?
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<jannau> I'm preparing to send a v2 of the mem layout patch and don't mind doing that
<kettenis> ok, go ahead
<jannau> feel free to add tested-by/on tags to all commits. I can reply on mailing list as well
<kettenis> feel free to add my reviewed-by for both patches
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<tpw_rules> kettenis: do you know what's happened to my efi timer patch? i am not real sure of the process
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<alyssa> $ git format-patch main > /dev/null
<alyssa> ^ how to submit kernel patches
<kettenis> twp_rules: a fiendly ping is probably overdue
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<int16h> Hello! I've just acquired a T6000/J314s so thought I'd see if I would poke around XD. I am, however, struggling to get a kernel to boot - the furthest it gets is: 'Preparing to run next stage at 0x1000dc00000...' before the proxyclient bailing and the log on the MBP screen clearing - I've applied the patches as described in the wiki::quickstart (and asahi.txt quickstart). Am I missing something? :D
<tpw_rules> i hope you meant friendly. should i just reply to the last email in the thread, or resend the patch?
<j`ey> tpw_rules: haha
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<int16h> ( I'm chainloading the newly compiled m1n1.macho, then: pcie_enable_devices.py, then: proxyclient/tools/linux.py -b "net.ifnames=0 earlycon console=tty0 console=tty0 debug net.ifnames=0 rw root=/dev/nvm0n1p5
<int16h> rootwait rootfstype=ext4" ../linux/arch/arm64/boot/Image.gz ../linux/arch/arm64/boot/dts/apple/t6000-j314s.dtb )
<alyssa> you really don't want ifnames huh
<jannau> marcan: please also take the two fixups in https://github.com/jannau/linux/commits/bits/010-devicetree replacing status = "ok" with the spec complient "okay" or "disabled" for the falsh
<int16h> :3
<jannau> u-boot ignores "ok"
<tpw_rules> int16h: that is a question more for #asahi
<int16h> Ah, sorry - I didn't realise I was in this one!
<kettenis> tpw_rules: just reply; sending a new one without changes tends to be frowned upon
<kettenis> (and yes, friendly)
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<jeffmiw> marcan: trying to catch up here about spmi/rtc, I was planning to clean-up my patches with checkpatch.pl to get them ready to submit but not sure if it still makes sense if you have worked and rewritten a lot. let me know what makes sense to do knowing I may progress slowly because of limited time. thx
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