ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<marcan> ok, too tired to do more work today, I'm going to sleep early for once. pushed things as is to spmi/work.
<marcan> t6000 should work; t8103 needs devicetree stuff (the nvmem/spmi bits)
<j`ey> marcan: yes get some rest!
<marcan> thanks :)
<j`ey> marcan: i guess the t8103 stuff is pretty simple, if copied mostly from the previous attempt..
<marcan> yeah, mostly
<marcan> just needs the nvmem offsets, which I think I pasted here previously
<marcan> also the RTC stuff is, of course, >12.x only
<j`ey> oh right.. that might be the push I need to get off 11.x :P
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<axboe> marcan: tested the new branch, and fwiw I see the same issue as the old one
<axboe> it works for the E cores, and first cluster of the P cores
<axboe> second cluster is stuck at whatever the boot frequency is
<axboe> second cluster also has cpu_capacity == 0 rather than 1024
<axboe> I feel like this is something silly, but it eluded me yesterday
<j`ey> does it try to change it? ie does it even get to apple_soc_cpufreq_set_target for the 2nd cluster
<axboe> I poked a bit yesterday, and seems like it was using the wrong clk base for pcluster2, it was the pcluster1 address
<axboe> which again made little sense, I saw all three get registered
<axboe> and the fact that capacity isn't set either just made me assume that something is wrong with the setup of that second pcluster
<axboe> new one does seem to set the right clock if I just force performance as the governor
<axboe> so might be as simple as schedutil being borken with capacity == 0
<axboe> given that the other clusters have it set right
<jannau> the readq_poll_timeout in apple_soc_cpufreq_set_target needs to be atomic
<axboe> in the devicetree in sysfs, capacity looks correct for all CPUs
<jannau> otherwise it appears to work expected on a m1 max with all cores
<axboe> jannau: curious on the m1 max, do you get the cpu capacity set for both p clusters?
<jannau> axboe: yes, 456 for the two e-cores and 1024 for all 8 p-cores
<axboe> jannau: hmm
<axboe> 456 here for E cluster, 1024 for first P cluster, 0 for second P cluster
<jannau> I suspect we need to remove the disabled core also in cpu-map in the devicetree
<axboe> did try that yesterday but didn't make a difference
<axboe> let me try on the new base, just in case I messed it up
<jannau> reproduced the missing capacity by skipping cpu 5 and 9
<axboe> booting now with those 2 removed
<axboe> I think m1n1 needs a fixup for that
<axboe> now it finds last cpu in p cluster 1 "not alive", and then hits a MPIDR mismatch on first cpu in cluster 2
<jannau> yes, I'm working on it
<jannau> axboe: https://github.com/jannau/m1n1/commit/55b48fd6f266815ed0d31c82cd1bce3cf14dd433 works for me with a patch to skip cores
<axboe> jannau: I can give it a whirl
<axboe> jannau: with or without editing the dtsi to remove the non-existent cores?
<jannau> axboe: should work with an unmodified dtsi
<axboe> jannau: ok, will try
<kettenis> to what extent does m1n1 trim the device tree?
<j`ey> marcan: spmi/work Kconfig has MFD_APPLE_SPMI_PMU, which seems to be leftover
<axboe> jannau: gives me a MPIDR mismatch
<axboe> DT CPU 1 MPIDR mishatc; 0x1 ~= 0x10100
<jannau> kettenis: quite bit if nodes are missing from the ADT, required by the hypervisor
<jannau> I'm only aware of the missing cpu cores for direct boot
<kettenis> I mean the FDT not the ADT
<jannau> it removes nodes from the FDT based on the ADT
<kettenis> right, and it should do so for the cpu nodes as well
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<jannau> it does, it doesn't however remove disabled cores from the cpu-map added for cpufreq driver
<axboe> if I just hack smp.c to keep a separate cpu index rather than use i it works for me, on top of plain m1n1
<sven> jannau: it should’ve been clairvoyant and done that already ;)
<axboe> fixes capacity, and cpufreq then works on 2nd pcluster too
<jannau> axboe: which "cpu-id"s do you have in the apple device tree? 0-7 or 0-9 with gaps
<jannau> m1n1 prints "Starting CPU x ..."
<axboe> jannau: this is with the dtsi trimmed, didn't try without for that hack
<axboe> jannau: so e(0 1) p(0 1 2) p(0 1 2)
<axboe> jannau: I tried your patch with stock dtsi
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<jannau> axboe: we have to solve this in m1n1 as we haf to use a single dtb for M1 Pro machines with 8 and 10 cpu cores
<axboe> jannau: yep
<axboe> for reference, this is the m1n1 hack
<axboe> haven't tried it with un-edited dtsi
<axboe> the sparseness ends up being an issue for the spin_table
<axboe> which the hack works around
<axboe> so might work with stock dtb
<jannau> I thought you tried with the unmodified dtb. I use https://paste.debian.net/1231019/ to simulate the sparseness and that works with my patch and the stock dtb
<axboe> jannau: for your patch I used unmodified
<axboe> jannau: like you asked :)
<axboe> jannau: see the debug output I badly typed
<jannau> ok. I saw that but I can't explain how the change could cause that
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<sven> axboe: do you want to submit that tipd interrupt mask fix or should I do it?
<axboe> sven: either way is fine with me, just let me know what you prefer
<sven> if you already have a patch that’s working it’s probably the easiest to just submit it
<axboe> ok, will do so right now
<axboe> sven: adding an actual changelog :)
<axboe> sven: do you want a suggested-by in there?
<sven> :D
<sven> uh, sure
<axboe> credit where credit is due
<axboe> Sven Peter <sven@svenpeter.dev>
<axboe> that your preferred email?
<sven> yup
<axboe> shipped
<sven> nice :)
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<axboe> I'm all for flushing out patches, hate carrying them
<alyssa> here here
<j`ey> so with the tps issue, it was a DEFER_PROBE thing or?
<alyssa> oh that tps
<axboe> I know you guys all know this, but I'm still blown away by the perf here. game changing imho
<j`ey> axboe: we're a bit late on the carrying patches part :P
<sven> yeah… we’re carrying way too many patches right now.
<axboe> j`ey: I know! but can always get done ;)
<j`ey> sven: 157 patches now
<sven> :(
<sven> At least I’m only responsible for maybe 10
<j`ey> sven: Im hopeful!
<axboe> with a big backlog like that, useful to just try and flush out some of the independent ones. at least that makes you feel like you made progress ;)
<jannau> sven: t6000-dart could use a ping for robin
<sven> I already pinged him off-list last week or so
<sven> I guess I could also re-submit that ugly usb hack
<axboe> sven: oh, reminds me, didn't find any time to fiddle with shared tags yet
<axboe> sven: as a temporary improvement, adjusting AQ to 2 would make sense imho
<axboe> I've only once seen higher AQ depth be useful, and that was under provisioning and with discard sizes being smaller where then having a higher admin queue depth made a difference
<axboe> sven: speaking of patches that could be pushed out... ;)
<axboe> sven: upstream would look kindly at the apple-nvme driver, as it can be combined with a "remove various weird apple workarounds or quirks" in the generic one
<sven> oh, I agree. But nvme requires this rtkit protocol that’s also required for smc. I’m just waiting for marcan to finish that part
<axboe> ah ok, dependencies
<sven> apple-nvme right now only works for platform devices fwiw
<axboe> ok, so we can't drop the generic quirks
<axboe> (not a huge issue imho, it's not very invasive)
<axboe> it's more of an hch'ism
<sven> :-)
<axboe> as long as they stay out of the fast path, then I don't really care
<sven> I considered adding a pcie backend to apple nvme but that driver is imho already big enough for the initial submission
<j`ey> .. did I just realise that the first 'h' stands for Herr?
<axboe> sven: I think the platform one is a good start
<axboe> j`ey: if we ever end up at the same conference, I'll tell you the story of the time hch took my kids to watch the lego movie
<j`ey> haha ok :D
<sven> yeah, it’s also been tested by a few people for at least weeks (and sometimes even months) now without any major issues
<jannau> marcan: spmi t8103 dts and a small fix for for the cpufreq driver https://github.com/jannau/linux/commits/spmi/work
<sven> just waiting for marcan and smc
<j`ey> and smc is mostly about the bindings
<jannau> working poweroff is nice
<sven> we’ll have to figure out how to deal with the shared rtkit dependency but I guess in the worst case we just create an immutable branch somewhere so that both trees can merge it after review
<j`ey> jannau: for the atomic thing did you actually get the sleep-during-atomic BUG, or just from manual inspection?
<jannau> I hit a sleep during atomic BUG
<kettenis> I hope the bindings we came up with will be fairly uncontroversial since they largely just use generic stuff
<axboe> sven: two subsequent boots I've run into aq timeouts
<axboe> haven't seen that before
<sven> huh, don’t think I ever saw that one either
<axboe> oh sorry, io queue
<axboe> hmm weird
<jannau> the same I saw with the old cpufreq patches?
<axboe> times out tag 10, then 2, then 3 and resets controller
<axboe> 30 seconds between each
<axboe> boots fine, log into X and start a bunch of things
<sven> guess I jinxed it by claiming no one had any major issues ;)
<sven> so it doesn’t even completion poll the commands but they actually time out?
<axboe> it does
<axboe> hang on, took a pic
<axboe> completioned polled for all 3, on last one it resets the controller, reset fails, IO errors ensue
<axboe> let me know if you want to see the pic
<sven> sure
<sven> it should only reset when completion polling didn’t find that command
<axboe> loading up the device with just reads doesn't lock it up
<sven> looks like the reset even fails
<axboe> didn't reproduce now on starting tbird + ff
<axboe> ok it did
<sven> -62 is timeout… so I guess the controller firmware doesn’t come up anymore? Weird
<axboe> same thing again
<axboe> ok so tag 2 this time, it reset the controller
<axboe> and it did come up fine
<axboe> (after reset)
<axboe> does look like it's correlated with some IO load and CPU usage
<axboe> eg loading firefox with bunch of tabs
<sven> looks like I can’t reproduce it on the M1. Let me try with the cpufreq driver
<axboe> sven: never saw it before adding that
<axboe> sven: question, what serializes writes to q->sq_db?
<sven> I don’t think I need to serialize writes there. it’s not really a queue pointer but just “please start command with tag x”
<axboe> sven: yeah I guess as long as the writel is atomic it should be fine
<sven> yeah. nvmmu_inval might need a lock though to serialize the write/read sequence
<jannau> still reproducible with setting the cpufreq governor to performance
<jannau> seeing following messages after nvme reset https://paste.debian.net/1231040/
<axboe> grabbing anv->lock around the issue does seem to fix it for me
<sven> weird
<axboe> could just be timing and I'll still hit it, but seemed to be trivial to hit before and seems solid now
<sven> strange, I can reproduce it with the cpufreq driver as well
<sven> and adding that lock seems to fix it too
<sven> i just don’t understand why
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<axboe> sven: trying to come up with a theory :)
<axboe> but having unserialized issue seems like asking for trouble
<axboe> though not quite sure why it needs to be serialized against irq
<axboe> how relaxed is the arm memory model?
<kettenis> very relaxed
<sven> very. that writel has a dma barrier though
<axboe> ok
<axboe> we _might_ just need an appropriate barrier so that it's visible on a different CPU
<axboe> but not sure how that's even easily doable without serialization anyway
<axboe> then again, not an ordering expert, I can always convince myself either way...
<axboe> I'd sugggest just going with the lock + irq disable around the issue for now
<sven> yeah, same here.. time to watch will deacon’s io ordering talk again ;)
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<axboe> sven: cuddle up with a cup of your favorite beverage and open Documentation/memory-barrier.txt ;)
<sven> I assumed that writel to MMIO should be enough. It’s dma_wmb which should order it against the previous writes to normal memory and then just a single STR
<sven> :D
<axboe> sven: my worry was between CPUs
<axboe> issue on N, irq right after on N+1 - seems far fetched though
<sven> hmmm… I wonder if there’s anything in the irq handler that could mess something up in that case
<axboe> the spin unlock is a barrier, and as irq grabs the lock too first, I think it'd be safe
<axboe> iirc you grab the lock around the whole irq handling
<sven> yeah, I’m pretty sure most of the irq handling is inside the lock
<axboe> another thing I just noticed, there seems to be excessive tcb clearing in there
<axboe> since we memset at alloc, do we really need to clear in both inval and submit?
<sven> ah, no
<sven> once should be enough
<axboe> seems we can kill both of those, and just set flags to zero
<sven> true, that’s even better
<axboe> I've got a patch for that too :)
<axboe> and now booted
<sven> i still wonder what exactly messes up the submission if it’s not inside a lock though
<axboe> sven: one idea
<axboe> you have two issues going on, one is half way through memcpy of command, other happens faster and submits the tag
<sven> the memcpys should be to two different tags though
<axboe> not sure how the nvme hw side works if first tag isn't written yet
<axboe> yep
<axboe> but only explanation I can find is that we trigger an interrupt for completion and don't find it, then it gets polled later
<sven> the hw first looks into the tcb at the specified tag, then reads the actual index into the “queue” (which is really more like an array here) and then reads the queue at that index
<sven> I just set index = tag so that I don’t have to deal with a tcb index and a queue index
<axboe> cleanup of irq handling
<axboe> unrelated
<axboe> no new ideas on the other front, yet
<axboe> sven: assuming you're keeping the ->enabled state for adding suspend, because I don't think it's needed right now
<sven> i think the enabled originally comes from NVMEQ_ENABLED in pci.c. i convinced myself at some point that i didn't need it but then went back a few days later because i convinced myself that i do need it and then decided to keep it for now just-in-case IIRC
<sven> and that irq handling indeed looks better :)
<axboe> yeah I don't think you need it right now, but for suspend you probably will. so I left it alone
<axboe> I'll toss you that tcb patch too in a bit
<axboe> you can just fold in or however you prefer, I don't need attribution since it's not in tree yet
<axboe> top 3 commits there
<axboe> (and what a mess of patches...)
<j`ey> axboe: 'force' in apple_nvme_handle_cq is unused now
<axboe> j`ey: heh, it's funny I even thought of that while doing it
<axboe> then forgot
<axboe> will fix
<j`ey> the code after /* last chance to complete any requests before nvme_cancel_request */ wont be useful if its removed
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<axboe> yeah I know, plan was to refactor around it but then I forgot the last bit
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<marcan> jannau, axboe: I expected the cpu-map issue; also that fix is probably incorrect
<marcan> we actually need to renumber the nodes in cpu-map, since the code expects them to be consecutive
<marcan> the fix will only work if only core #3 is missing from each cluster