ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<millenialhacker> Does anyone know how to interpret "segment-ranges" property in ADT ?
<sven> for co-processors? iirc those are the memory regions of the firmware
<jn> i haven't seen an example, but based on the name, it'd try to read it as a address translation map, like "ranges"
<sven> each entry should contain the iova, the physical address and the length
<sven> and there should be a segment-names that sometimes even tells you the name of the segment (e.g. TEXT or DATA)
<millenialhacker> What I know so far it's that it should include IOVA / PHY / LENGHT and some REMAP (???) stuff. but when I try to read it from my ADT, it makes no sense.
<millenialhacker> e.g: 00 80 9D 00 08 00 00 00 00 00 00 00 00 00 00 00 00 80 9D 00 08 00 00 00 00 80 9B 00 03 00 00 00 00 C0 9A 01 08 00 00 00 00 80 9B 00 00 00 00 00 00 80 9B 00 0F 00 00 00 00 C0 41 00 00 00 00 00
<millenialhacker> if I split in 8 bytes (numbers I see doesn't look IOVA or PHY address)
<jannau> for DCP I see 32 bytes per segment, first 8 byte seems to be physical address in 32-bit cells, little endian
<jannau> the physical address should be in /carveout-memory-map
<WhyNotHugo> I'm trying to install NixOS on an M1. I intend to use the same kernel sources as Asahi. What `config` options need to be different from the defaults for M1 support?
<millenialhacker> @jannau: yes, it's 32 bytes per segment, each segment divided in four 8-bytes value. What do you mean by phy-add in 32-bits cells?
<_jannau_> millenialhacker: values in devicetree are represented as cells of u32
<jn> how do two 32-bit cells combine to form a 64-bit number, in ADT?
<jn> little endian as inside a cell, or big-endian as in other devicetree implementations?
<_jannau_> not sure. not even sure if segment-ranges is expressed in cells. The ADT is a mess. it's just how I think about values in the device trees
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<null> winter: 9
<null> SOrry, that was meant to be `/window 9` but I hit the wrong key
<maz> null: I though you were playing "Riot in cell block #9"...
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<marcan> jn: little endian. ADT doesn't really use cells, it's just "whatever Apple felt like throwing in there"
<marcan> though it does align sizes to 4 bytes IIRC
<marcan> but there are whole C structs in there and such
<jn> i see
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<kettenis> marcan: what's holding back further upstreaming?
<kettenis> for example the spi stuff?
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<jannau> marcan: https://github.com/jannau/linux/tree/bits/000-devicetree-t6002 rebaed bits/000-devictree with t6002 support
<jannau> I splitted commits between t600x and t8103 to make the rebasing simpler. t600x is splitted so that we could submit the devicetrees for all devices for 5.19, i.e. nvme is in, cpufreq is not
<jannau> still missing dt-bindings updates for mac studio (and the macbooks if we haven't done it already)
<jannau> only the merged tree tested so far (single boot on the mac studio)
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