ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<nickchan>
okay a8x cpmu is getting even more interesting
<nickchan>
PMI mode generates a sync exception with a ESR of 0x94000200
<nickchan>
AIC mode can be set but does nothing
<nickchan>
FIQ mode is RES0 so probably not supported
<nickchan>
and HALT mode halts the CPU as expected
<nickchan>
16-bit instruction trapped and ISV is 0
<nickchan>
am pretty sure that's illegal
<nickchan>
data abort exception too
<nickchan>
EA, bit [9]
<nickchan>
External abort type. This bit can provide an IMPLEMENTATION DEFINED classification of External aborts.
<nickchan>
ffs i don't want to add impdef aborts into linux
<nickchan>
by generating a sync exception I mean it is generated at the expected time, where the counter reaches 48 bit
<nickchan>
even as IMPDEF delivering a data abort doesn't sound right to me however
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<nickchan>
all of a7-a11 can deliever the sync exception
<nickchan>
but only a11 can deliver the fiq
<LarstiQ>
nickchan: do you have a whole testbench of devices?
<nickchan>
LarstiQ: i have a lot
<nickchan>
these devices are lot cheaper than macs :)
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<nickchan>
there is no hypervisor however so a lot more blind probing
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<LarstiQ>
just fun poking around or is this yak shaving for some other goal?
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<nickchan>
LarstiQ: to get performance counters working properly in Linux
<LarstiQ>
nickchan: for those devices themselves, or as inspiration for Asahi targeted macs?
<nickchan>
LarstiQ: for those device themselves
<nickchan>
there's quite a bit of hw differences
<nickchan>
I really hope I can get AIC mode to work because otherwise it's to insert an IMP DEF hack inside Linux's sync exceptio handler
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<nickchan>
This also means the current AIC FIQ handler is wrong for A7-A10
<nickchan>
because the CPMU on these can't deliever a FIQ, the fiq handler should not touch the PMC registers
<nickchan>
actually
<nickchan>
it's technically wrong for every CPU
<nickchan>
because I believe the CPMU has other modes even on M1
<nickchan>
the FIQ handler probably should only touch the PMCR0 register when PMCR0_IMODE is set to FIQ
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<nickchan>
this is actually m1n1's behavior
<nickchan>
so it should be fine
<nickchan>
for linux too
<LarstiQ>
nickchan: I'll applaude from the sidelines. I like reading your progress but can't help much. Unless you need some rubber duck debugging!
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<nickchan>
or maybe no hack but also give sync exception the fiq treatment when adding m1 support except the default handler is the normal sync exception handler
<nickchan>
and then allow the custom sync exception handler to call the default sync exception handler
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<nickchan>
in the AIC mode that ostensibly is supposed to deliver an IRQ not only no IRQs are received but PMCR0_IACT never gets set as if it's in OFF mode
<anuragrao>
Hey, I'm new here and would like to try to help with WiFi P2P support. If this is supported, we can partially solve the external display problem on Macbook Air devices. I tried setting it up with gnome-network-displays but then I can see errors in journalctl and dmesg. I looked through the driver code for brcmfmac and saw there is a p2p.c file. I'm new to kernel development and want to understand the scope of this problem an
<anuragrao>
what is the state of wifi p2p at the moment, what layer is it supported until and what layer has to be implemented? the output of iw phy lists p2p-client p2p-go and p2p-device as supported interface modes
<jannau>
I've tagged asahi-6.12.9-1 not much interesting compared to 6.12.8-2. fix for SError on boot for t602x and a small dcp audio fix for some devices (still not enabled)