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02:49
<
marcan >
sven: do you have your aes test code somewhere? I'm pretty sure I can figure out how DAPF works
02:49
<
marcan >
and I do get the feeling that's what SIO is doing, driving the UART/SPI controllers and such and DMAing the results back...
02:49
<
marcan >
it lists all the SPI and UART controllers in the firmware, and more
02:50
<
marcan >
that's why I think it's completely optional, because it seems to be totally generic
02:51
<
marcan >
supporting all those blocks, including UART0
02:51
<
marcan >
and we can just drive the hardware directly instead
02:56
<
alyssa >
marcan: totes unerlated but I just realized, remember the funny G13G A0 that has full drivers shipping despite my mac already being G13G B0 and mine being purchased in 2020?
02:56
<
alyssa >
looking at the dates, I'm now 80% sure G13G A0 is what's in A14
02:56
<
alyssa >
and B0 is what's in M1
02:57
<
alyssa >
not sure if there are A14 ADTs floating around to confirm but it makes sense-- earlier than the M1 but still in the H13P family.
02:59
<
marcan >
makes sense
02:59
<
alyssa >
I guess if I were motivated I could get an A14 restore ipsw and extract the ADT from that but that sounds like effort
03:02
<
alyssa >
Thankfully, we don't have to care about that unless somebody finds a bootrom exploit in the latest iThings 😋
03:02
* alyssa
supposes she has a conflict of interest as a result
03:06
<
alyssa >
There's an A12 ADT on theiphonewiki, it looks intensely familiar ;-)
03:08
<
alyssa >
only striking differences are ISP and no DCP
03:09
<
marcan >
alyssa: where is the gpu rev in the adt?
03:10
<
alyssa >
not sure :-|
03:10
<
marcan >
is it even in there? :p
03:11
<
alyssa >
i mean macos has to know somehow ....
03:11
<
marcan >
yeah but it could query the hardware
03:11
<
alyssa >
oh, true. annoyingly true.
03:12
<
marcan >
I mean that's pretty common for silicon revs
03:12
<
marcan >
you don't usually hardcode that in devicetrees
03:12
<
alyssa >
idk, apple encodes a lot of funny things in their device trees i've stopped taking "usually"s seriously 😋
03:15
<
alyssa >
Corellium's black hat presentation has ISP still list on the M1 but I don't see it in the ADT so i'm guessing that's an error in their presentation
03:15
<
alyssa >
(but an error in the ADT is also possible, who do we trust more here tbh)
03:15
<
marcan >
you're looking at the Mac Mini, right?
03:15
<
marcan >
well no shit, it doesn't have a camera
03:15
<
marcan >
try looking at one of the macbooks
03:16
<
alyssa >
I would have thought that was just part of the SoC, though?
03:16
<
marcan >
the ADT does not describe all the hardware that actually exists, not even close
03:16
<
marcan >
only the blocks which are actually used in any given device
03:16
<
marcan >
remember there are like 8 UARTs
03:16
<
alyssa >
right. okay, fine. right. boring, but alright.
03:17
<
marcan >
also I'm pretty sure there are at least 12 coprocessors
03:17
<
marcan >
e.g. including ISP which you didn't count
03:17
<
alyssa >
where am I supposed to get an ADT for !mini
03:17
<
alyssa >
("at the apple store, C$1000 later")
03:18
<
alyssa >
well, this is enough yelling at clouds for me. thanks :)
03:21
<
marcan >
mg4tool -e Firmware/all_flash/DeviceTree.j313ap.im4p -o Firmware/all_flash/DeviceTree.j313ap.adt
03:21
<
marcan >
cd m1n1/proxyclient; python -m m1n1.adt ../../Firmware/all_flash/DeviceTree.j313ap.adt
03:21
<
marcan >
alyssa: have fun :p
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07:01
<
j_ey >
marcan: the reason I asked about uart because I'm pretty sure that code was the soure of SErrors for me.
07:02
<
j_ey >
and then clear_irqs() writes to that mmio that has its clock disabled
07:03
<
j_ey >
(I dont understand why, when watching your stream back, you dont se the clocks being disabled)
07:04
<
j_ey >
(I'll try reproduce it on clk/new later)
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08:38
<
marcan >
j_ey: I think my build has PM disabled, which might explain why I didn't see it
08:39
<
marcan >
anyway, that just means that's another PMU hook we need to add to the HV
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<
marcan >
we already have a bunch of those
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09:01
<
sven >
i also never tried with just setting stream 15 to bypass
09:03
<
sven >
it's very high quality code as you can tell by the time.sleep(1) :P
09:04
<
chadmed >
omg lmao i missed that
09:04
<
chadmed >
did you have a race happening or something
09:04
<
marcan >
and by the guarded malloc when all those allocs are volatile anyway :p
09:04
<
marcan >
none of that makes a difference for experiment scripts :p
09:04
<
sven >
chadmed: i just didn't bother to find the "aes engine is busy" bit
09:04
<
sven >
marcan: yeah, i did my very best there!
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12:57
<
alyssa >
sven: nice :]
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13:59
<
marcan >
huh, since when does the kernel test robot pull from our trees?
13:59
<
marcan >
or did someone manually submit that?
14:00
<
sven >
it's been doing that for quite a while now
14:02
<
marcan >
I wonder how that happened
14:03
<
marcan >
maybe just because I mentioned our repo in submissions?
14:03
<
sven >
isn't it also in the MAINTAINERS file?
14:05
<
marcan >
yeah, that too
14:06
<
j_ey >
looks manual then
14:09
<
marcan >
not so sure, a whole bunch went in at that time, which probably coincided with the merges?
14:09
<
marcan >
and that author is some role account
14:09
<
marcan >
could be a script monitoring MAINTAINERS
14:09
<
marcan >
works for me, all the more reason to get the code on our branches in shape :D
14:10
<
sven >
that's also how the nvme maintainers found that nvme branch fwiw
14:10
<
marcan >
ahaha because it CCed them too?
14:10
<
marcan >
where'd that discussion go?
14:10
<
sven >
i think that guy had some filter for nvme
14:30
<
pipcet[m] >
marcan: just to confirm, the official policy on mixing proxyclient python code and m1n1.macho built from a different version of m1n1 is "don't ever do that, daemons will come flying out of your nose"?
14:31
<
marcan >
I try to keep chainload.py working. that's it.
14:32
<
marcan >
the hypervisor explicitly breaks ABI all the time, no support for mixing there
14:32
<
marcan >
for everything else, your mileage may vary. simple shell stuff is usually OK.
14:41
<
alyssa >
and obviously if m1n1.macho hasn't changed at all you're fien
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14:53
<
pipcet[m] >
thanks!
15:34
<
sven >
marcan: i'm gonna squash your rtkit version negotiation (with s/max/min/ so that it doesn't break on my machine :D) into that rtkit wip commit
15:34
<
sven >
i kinda expect that rtkit.c will end up being co-developed by atleast alyssa, you and me anyway
15:36
<
j_ey >
sven: are you looking at anything new?
15:37
<
sven >
no. i still have to clean up this mailbox/rtkit/sart/nvme thing
15:39
<
sven >
and hopefully at least send the first patches for the mailbox stuff upstream later this week
15:42
<
j_ey >
sven: sounds good! one less thing to carry between branches
15:42
<
sven >
and after that if we have i2c by that point maybe look into the usb phy stuff
15:43
<
sven >
j_ey: yeah, and everything after the mailbox needs more thoughts anyway.
15:43
<
sven >
especially the rtkit stuff
15:56
<
alyssa >
sven: let me know when there is a proper nvme series i can cherrypick o:)
15:56
<
sven >
depends on your definition or proper i guess :>
15:58
<
sven >
is it enough for a twitter picture? sure. can you use it every day without fearing for your data? probably, but i hope you have backups anyway. is it remotely ready to submit it to LKML? nope.
16:03
<
alyssa >
sven: definition s "can i use it every day without fearing for my data?" and "is it rebased to look like actual commits with messages that aren't just WIP and without gigantic hacks in the middle [looking at you compat-mailbox]"
16:03
<
alyssa >
I still dont understand the mailbox vs compat-mailbox thing
16:04
<
sven >
compat-mailbox will disappear. that's really just there to test if SMC still plays nicely with the rtkit stuff
16:04
<
alyssa >
right ... what changes need to be made to corellium's SMC driver to you use not-compat mailbox then..?
16:05
<
alyssa >
(beyond switching from u64[2] to u64, and ioremap_np)
16:05
<
sven >
probably none, but no idea
16:05
<
sven >
i should be enough to point the corellium SMC driver to the compat-mailbox, but i never tested that
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16:11
<
alyssa >
the non-compat mailbox you mean?
16:11
<
sven >
the non-compat mailbox doesn't do any rtkit stuff
16:12
<
alyssa >
because rtkit lib stuff..?
16:12
<
sven >
all it does is send/recv 64+32bit messages
16:12
<
sven >
yes. because i wanted to give marcan's rtkit library idea a try
16:13
<
alyssa >
sven: " for the common IPC protocl used by these."
16:13
<
alyssa >
" * Enum to identify if Linux or RTKit own the shared memory buffers."
16:14
<
alyssa >
" * @shmem_owner: Specified the owner of the shared memory buffers, can"
16:14
<
alyssa >
" * should usually be called withint _probe."
16:14
<
sven >
er.. is that the rtkit commit?
16:15
<
sven >
see "WIP". i didn't proof read or ran any kind of spell check on it :)
16:15
<
alyssa >
" * @cookie: opaque cookie passed to all functions defined in rtkit_ops"
16:15
<
alyssa >
om nom nom nom!!!
16:15
<
alyssa >
I really like this API i think
16:16
<
j_ey >
sven: youre adding cookies back, now that robin removed them from DART :P
16:16
<
sven >
i'm probably gonna miss these comments in irc fwiw. can you try to write them on github maybe? (does github support commenting on commits that are not PRs?)
16:16
<
alyssa >
sven: " Say Y here if you want to build the Apple ASC mailbox driver."
16:16
<
alyssa >
I /think/ this is actually an IOP mailbox driver?
16:16
<
alyssa >
and the rtkit lib is the ASC part?
16:16
<
sven >
that ASC needs to disappear
16:16
<
sven >
i don't think so
16:17
<
sven >
take a look at ioreg from macOS
16:17
<
sven >
there's some ASCWrap or so entry that handles the mailbox
16:17
<
sven >
and then RTBuddy or something which handles the rtkit part
16:17
<
alyssa >
sven: btw, I like your handling of ASC vs M3 a lot
16:18
<
sven >
but that ASC there needs to disappear anyway because next to ASC there's also this M3 thing
16:18
<
sven >
i'm quite happy with rtkit library idea. not totally happy with the implementation yet
16:19
<
sven >
especially the shared memory vs. sart vs. just iommu part
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16:24
<
sven >
j_ey: robin just wanted all the cookies for himself instead of letting individual drivers handle them :P
16:24
<
j_ey >
he's the real cookie monster!
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16:25
<
maz >
j_ey: robin and cookies? GF cookies, maybe...
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16:46
<
marcan >
sven: yeah feel free to play the git game however you want
16:46
<
marcan >
all those commits get rewritten for upstreaming anyway
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18:04
<
krbtgt >
> Their "secure enclave" is just a mailbox interface on top of ARM's TrustZone
18:04
<
krbtgt >
this doesn't seem correct
18:05
<
j_ey >
what's that a quote from?
18:05
<
sven >
it has a mailbox interface, and it also has something apple calls trustzone but it's unrelated to ARM's TrustZone
18:05
<
sven >
what apples calls trustzone is (as far i know and don't quote me on this) their memory lockdown feature
18:06
<
sven >
in the bootrom their security coprocessors gets to "steal" some RAM and lock it down so that the main processor can't access it anymore
18:06
<
sven >
(and on top of that it has transparent memory encryption and an integrity tree with the root hash stored outside of RAM)
18:06
<
sven >
that's what apple seems to call trustzone
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