ChanServ changed the topic of #dri-devel to: <ajax> nothing involved with X should ever be unable to find a bar
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<airlied> imirkin: btw 11646 has the fix for one deqp regression I had with unorm depth fbo
<airlied> 16-bit
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<airlied> tarceri: with that cache change I don't think I'm seeing the endless stalls on the older machines anymore
<tarceri> cool. thanks for testing
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<tarceri> airlied: I'll probably push it later today unless you stop some issues
<tarceri> *spot some
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<airlied> mareko: not sure if you care about EXT_gpu_shader4 testing: https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/544
<airlied> I added some more piglit coverage for the ext where glsl 1.30 isn't available
<airlied> Kayden, jekstrand : ^
<Kayden> nice!
* airlied is on two fences on whether we really want to auto generate all the built-in tests or not
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<daniels> jenatali: surface == swapchain, image == everything else :P
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<MrCooper> bnieuwenhuizen: amdgpu evicts a BO from VRAM to system RAM for CPU access only if it's not currently CPU visible, and there's no space for it in the CPU visible part of VRAM; i.e. never with resizable BAR
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<pq> danvet, I'm like a moth to a flame... when I see it, I can't help myself.
<pq> bnieuwenhuizen, given that dumb buffer mmaps do not get torn down before using them in KMS, I doubt moving them.
<daniels> pq, emersion: ++ for the UAPI feedback, super helpful you are both keeping on top of it and trying to keep it coherent :)
<emersion> <3
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<pq> thanks!
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<pq> but as pinchartl wrote, it may be futile anyway.
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<bnieuwenhuizen> MrCooper: was thinking of dmabufs: https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c?h=amd-staging-drm-next#n387 Not sure which path dumb buffers take
<pq> A painful path, I'm sure.
<MrCooper> amdgpu_object.c:amdgpu_bo_fault_reserve_notify()
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<MrCooper> bnieuwenhuizen: a couple of things to keep in mind for that dma-buf related code: 1) it only moves to GTT where that's supported for scanout, i.e. only with newer APUs, not any dGPUs 2) it's only relevant when PCIe p2p is supported, otherwise dma-bufs are always pinned to GTT while shared with another device
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<MrCooper> I guess this could be called while it's not shared though
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<mriesch> hi all, are there ongoing efforts to update the mainline rockchip drm drivers to support the new quartz64 board? ezequielg: looking in your direction ;-)
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<Dylanger> (virgl to Mali/ARM Host)
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<daniels> not off the top of my head - we do have some virgl-on-crosvm testing, but I don't know off the top of my head if it covers GLES guests, and assuming you're using the proprietary Mali drivers, we don't test on those either (Panfrost ftw)
<daniels> *GLES hosts
<robclark> virgl-on-crosvm does work with mesa/freedreno fwiw, I've seen it with my own two eyeballs ;-)
<robclark> it could be proprietary driver misses some extensions that virglrenderer needs?
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<imirkin> virglrenderer desperately wants some mesa-only ES exts to make desktop GL work properly
<imirkin> (not technically mesa-only, but practically)
<robclark> yeah, that sound quite likely
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<mriesch> hi all! are there ongoing efforts to mainline the rockchip drm driver for the quartz64 board? ezequielg: looking in your direction ;-)
<siqueira> Hi MrCooper , hwentlan I'm working on a set of IGT failures that get fixed by this patch https://paste.centos.org/view/79dc2fa1 . However, I'm afraid that I can regress the userspace due to this issue https://gitlab.gnome.org/GNOME/mutter/-/issues/1108 (you made the kernel patch to fix it), as you can see in my commit description, I was not able to
<siqueira> reproduce the problem. Could you share some of your thoughts on this change? Maybe I should test something else with this patch?
<danvet> siqueira, maybe the igts just hard-code the assumption that cursor without primary plane is possible?
<danvet> so we'd need to do a check for that first, and if it fails, skip the entire test?
<danvet> s/entire/specific/
<danvet> oh also nothing cursor specific here, just really any feature at all I guess
<danvet> there's a lot of hw that requires primary plane to be on out there
<siqueira> danvet I think IGT is fine, for example, in the kms_atomic_transition (https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/blob/master/tests/kms_atomic_transition.c#L524) we fail when we try to enable the CRTC without a plane. From our hardware perspective, we can accept this; however, we added this patch
<siqueira> https://patchwork.kernel.org/project/dri-devel/patch/20200904104304.41246-1-michel@daenzer.net/ to fix a cursor issue under Gnome. Do you know which other hardware requires an active plane when enabling CRTC? If we have more cases like that, maybe I need to update IGT.
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<danvet> siqueira, a lot of hw under drm/tiny
<danvet> so much so that we made it a simple boolean to set in the plane check helper function
<danvet> ah now that's not a helper
<danvet> but tiny requires it
<danvet> iirc
<danvet> there's others
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<siqueira> hhmmm... I tried to find something like drm_crtc_helper_funcs under tiny directory to check this boolean value under some atomic_check function, but looks like that tiny does not rely on this type of hook, right? Any hint on where I should look for this boolean value? I checked drm_plane and drm_plane_state and I did not see any reference to this
<siqueira> check.
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<danvet> siqueira, see drm_simple_kms_crtc_check
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<jenatali> jekstrand: I'm chatting with someone who's trying to take some SYCL code, take the device bits after it's been split from the host, convert to SPIR-V, and then try to send that through the CLOn12 compiler to get DXIL
<airlied> jenatali: sounds like a lot of problems :-P
<jenatali> They're bumping into some weirdness where LLVM + the translator produces built-ins in the global address space, which is against spec, since CL says they have to be Input... and then it casts them to generic for no good reason before loading them
<airlied> jenatali: I assume that's the SPIRV-LLVM-Translator
<jenatali> airlied: I think it shouldn't be that many, really
<jenatali> Yeah, it is
* airlied assumes latest version of everything are in use
<jenatali> Yep
<airlied> karolherbst: ^ might remember some of this as well
<jenatali> Anyway, vtn doesn't like having the variable in the wrong address space and asserts before overriding it to system... and then nir validation blows up trying to cast from system -> generic
<jenatali> And obviously the SPIR-V is incorrect, but really only barely incorrect, and I'm wondering how people would feel about some cheap hacks to make it work - seems like vtn consuming SYCL SPIR-V would be generally valuable
<karolherbst> jenatali: ehh.. didn't we fix something like that in the translator?
<jenatali> karolherbst: Not related to this
<karolherbst> *Sigh* :(
<jenatali> https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/1093 is what I filed for it having the wrong address space
<karolherbst> mhhh
<jenatali> Ooh
<karolherbst> this was before the spec got fixed though :D
<karolherbst> maybe somebody broke it
<jenatali> karolherbst: Oh, this is when mapping a CL C *function* to a built-in global variable
<karolherbst> ahh
<jenatali> But the CL C functions rely on name mangling, and since it's C, all user functions will be unmangled... so SYCL apparently devised their own way of getting at builtins
<karolherbst> mhh
<karolherbst> sounds annoying
<jenatali> They abuse that C++ reserves names starting with double underscore, and say that __spirv_BuiltIn{Name} variables are decorated as built-in
<jenatali> But in the LLVM IR they don't have any way of annotating that those need to be "input", since SPIR only defines address spaces 0 thru 4 (private, global, constant, local, generic)
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<karolherbst> mhh, right
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<agd5f> jenatali, weird question, but do you know the timeout value windows uses for D3hot to D0 state transitions on PCI?
<jenatali> agd5f: Not off the top of my head, no. I work higher in the stack than that
<agd5f> jenatali, no worries. just curious
<jenatali> If it's important I could probably find out
<agd5f> The windows team is going to ask their contacts, so probably not a big deal. thanks though
<agd5f> AMD windows team
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<jekstrand> jenatali: Uh... Fix SYCL?
<jenatali> jekstrand: Yeah, I agree
<jekstrand> I'm fine with doing simple things that get stuff running if we can't change said stuff but we should always try to fix the real bug
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<Dylanger> Thank you daniels robclark imirkin
<Dylanger> I'll continue digging today
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