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<karolherbst> jekstrand: you wouldn't believe it...
<karolherbst> I think intels official stack is slower...
<karolherbst> at least it shows fewer samplers/sec and rays/sec...
<karolherbst> it compiles incredibly quickly though
<karolherbst> okay.. now this is funny
<karolherbst> airlied: ^^
<karolherbst> okay, now I want to beat intels CL stack by a significant amount
<karolherbst> what the hell
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<mattst88> lol, awesome
<karolherbst> mattst88: result was like 2% lower in the end, but wtf
<karolherbst> we inline verything, we spill like crazy, how can we be not terrible :D
<mattst88> hahaha
<karolherbst> "SIMD8 shader: 2867 instructions. 1 loops. 36414 cycles. 107:102 spills:fills, 3 sends, scheduled with mode top-down. Promoted 30 constants. Compacted 45872 to 36096 bytes (21%)" ...
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<karolherbst> mattst88: we still can't compile the really huge ones though
<mattst88> what breaks?
<karolherbst> memory
<karolherbst> 32GB aren't enough as it seems
<karolherbst> the other kernels are just that huge
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<mattst88> the intel compiler runs out of memory?
<karolherbst> I meant mesa
<karolherbst> I think it's something with nir though
<karolherbst> too many objects
<zmike> time for a rewrite
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<karolherbst> you underestimate how big those kernels end up to be, let me dump one
<mattst88> karolherbst: yeah, I ran into some problems like that when I was working on soft-fp64
<mattst88> IIRC one shader caused the compiler to use like 80GB of RAM
<icecream95> zmike: Maybe yair (Yet Another Internal Representation)?
<karolherbst> nir isn't the problem though
<karolherbst> we just need to support function calls
<karolherbst> (in the backends)
<karolherbst> maybe we can get away with a smarter function inlining, dunno
<karolherbst> yeah...
<karolherbst> I think the issue isn't that huge, it's just inlining which is wasteful with memory
<karolherbst> can we have function inlining, but one that already removes functions which are dead?
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<karolherbst> vec1 32 ssa_954925 = ishl ssa_954816, ssa_954791 you think it will hit the million?
<karolherbst> it feels like the same stuff is there like 20 times
<karolherbst> yeah.. I think we don't really need function calling yet, we just need an inlining which doesn't use like all memory
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<karolherbst> fixed inlining :3
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<karolherbst> but now I think we leak a lot of memory
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<karolherbst> 1.5M ssa values :O and it's still printing
<Sachiel> next patch, make the ssa index 64 bits
<karolherbst> "I need that"
* karolherbst builds release build
<jekstrand> karolherbst: \o/ I'll happily take NEO being slower. :D
<karolherbst> let me benchmark on a release build or something
<karolherbst> anyway.. I have a entrypoint only inlining thing which works
<karolherbst> now it runs out of memory later
<karolherbst> I think we have to optimize our passes a little :D
<karolherbst> they rely to much on "I can only change one little thing, because I will be reran anyway"
<karolherbst> wow
<karolherbst> I got another scene from luxmark to compile
<karolherbst> nice
<karolherbst> now let's see how long iris needs to crunch through it
<karolherbst> shader cache be like: I have one shader and I am like 2GB big
<jekstrand> oof
<karolherbst> I mean.. I guess this will happen
<jekstrand> Yeah, functions would help luxmark a lot
<karolherbst> yeah okay.. iris needs more than 2 minutes to finalize those kernels
<karolherbst> 22.7/28.7 GB used and I am wondering if I run OOM again or if that works out
* jekstrand wishes this segfault would repro in GDB...
<karolherbst> ahh I had some of those recently as well
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<karolherbst> ahh
<karolherbst> register_coalesce.. yeah I guess that will take some time
* jekstrand fires off a deqp build in the back-ground in hopes of triggering timing errors
<karolherbst> hum.. ssa_467689 that's not too much is it?
<jekstrand> Nah...
<jekstrand> That sounds like some of those BVH building shaders
<karolherbst> I already hit 2 millions today, so antyhing below that won't shock me
<karolherbst> it's slow though
<jekstrand> for sure
<karolherbst> I think we need to optimize the CPU side a little :p
<jekstrand> Hrm... How do I run with asan?
<karolherbst> with LD_PRELOAD
<karolherbst> or do you mean inside gdb?
<jekstrand> by itself
<jekstrand> Do I need to build with special flags?
<karolherbst> besides -Db_sanitize=address ?
<jekstrand> That'd be the one. :D
<karolherbst> :D
<karolherbst> but if you build mesa with it, you need to LD_PRELOAD libasan
* jekstrand rebuilds
<jekstrand> yup
* jekstrand waits on I/O
<icecream95> Sometimes doing LD_PRELOAD of libasan.so is useful even without compiling with sanitizers
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<jekstrand> Ugh... Completes with asan. :-/
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<shadeslayer> jekstrand: there's other sanitizers than address btw
<shadeslayer> "The value of b_sanitize can be one of: none, address, thread, undefined, memory, address,undefined"
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<tjaalton> could someone cut a release of mesa-demos? the previous one is four years old
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<kisak> it would be nice if Debian/Ubuntu also had a 32 bit build of mesa-demos which renamed glxinfo / glxgears to something like glxinfo32 / glxgears32 and could be installed beside mesa-utils. It's awkward telling current Ubuntu users to grab mesa-utils:i386 from 18.04 (and not install it) to do basic GL render tests.
<tjaalton> why?
<imirkin> 32-bit libs are a thing
<imirkin> and it's nice to know that they're installed correctly
<kisak> Ubuntu 20.04+ doesn't have a 32 bit glxinfo in their repoes at all. Debian's multi-arch implementation prevents 32 bit glxinfo and 64 bit glxinfo from existing on the same system install
<karolherbst> kisak: well sounds like something you need to do, no?
<karolherbst> *your distribution
<imirkin> that's what he's doing :)
<karolherbst> :)
<imirkin> tjaalton is a ubuntu package person
<karolherbst> ahh
<karolherbst> didn't know
<tjaalton> and debian, apart from jcristau everyone else has left the building :P
<tjaalton> when it comes to mesa/xorg, mostly
<tjaalton> I see a bug from 2015
<tjaalton> seems I haven't touched mesa-demos before
<imirkin> it doesn't get a ton of changes...
<tjaalton> es2gears_wayland from 8.4.0 segfaults here
<tjaalton> with current git it doesn't segfault, but doesn't show anything useful either
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<pcercuei> I only need an ACK for the first patch, the rest of the series is already ACK'd
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<karolherbst> jekstrand: so I am not sure if this is a bug yet, but I do have a kernel with scratch memory of 8 bytes, it does one store at 0 and then indirect loads based on other values and I don't think we can proof that the load always happens at 0
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<jekstrand> karolherbst: hrm.
<jekstrand> karolherbst: It's possible
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<jekstrand> My poor little raspberry pi....
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<jekstrand> Oh, these CTS tests are horrible....
<jekstrand> If the CPU and GPU race, they segfault.
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<jekstrand> Because someone was trying to be way too clever with a for loop
<jekstrand> :facepalm:
* clever waves
<clever> ive been looking into triangle-fan and triangle-strip lately, trying to figure out how exactly they work
<clever> ah, there it is in the mesa source, INDEXED_PRIM_LIST
<jekstrand> Good news is that I think it tells me very specifically where my bug is. :joy:
<clever> in `v3d_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)`, where exactly is the data at `info->start` coming from?
* clever reads src/gallium/include/pipe/p_state.h
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<karolherbst> jekstrand: okay, so it is an array of size one, which explains the indirect. The size is defined by a compiler -D flag, which is set to 1, so that part is all fine
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<karolherbst> now if we can optimize it to a 0 or not
<jekstrand> karolherbst: Not sure. This is OpenCL. OOB array access may be well-defined in some cases. :-/
<jekstrand> Or at least expected to work
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<karolherbst> ohh, I didn't mean it like that
<karolherbst> maybe we can infer from somewhere else that the index must be 0
<karolherbst> reading the code to understand what's going on atm
<karolherbst> uhh who writes code like that :(
<jekstrand> idk
<jekstrand> People who write OpenCL code. :P
<karolherbst> I didn't mean this array acces
<karolherbst> it's all hidden behind macros
<karolherbst> initing that array
<karolherbst> accessing it
<jekstrand> Naturally. :)
<karolherbst> even the kernel args
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<clever> when using something like GL_LINE_STRIP, is there any special escape code, to start a new strip?
<jekstrand> clever: That's what primitive restart is for
<clever> and how does that work?
<karolherbst> we might want to print variable names alongside load_param
<karolherbst> it's all nice if you have 3 params, but I am looking at functions with 20 or more :)
<karolherbst> uhhh
<karolherbst> the hell is this code
<karolherbst> so yeah.. the index is 0
<karolherbst> let's see if we optimize into a wrong direction somewhere
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<MTCoster> A *hmmm* in three parts...
<MTCoster> c->MaxArrayTextureLayers = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS);
<MTCoster> c->MaxFramebufferLayers = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS);
<MTCoster> if (... || consts->MaxFramebufferLayers >= consts->MaxArrayTextureLayers)
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<jekstrand> MTCoster: History, maybe?
<jekstrand> They may have been separate cap bits in the past
<MTCoster> jekstrand: Ahh that would make sense
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<calebccff> I'm getting some fun stack traces on my OnePlus 6 with the 5.18 merge window when entering/exiting suspend: https://p.calebs.dev/27fa2c, unbalanced IRQ enable in msm_dsi_host_enable_irq
<calebccff> the display still turns on and works again, eventually
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<Lyude> danvet, mripard - jfyi, I think I've got a hang of the parallel modesetting stuff w/r/t MST now :), thanks for your help! hopefully should have something on the mailing list soon
<Lyude> already got some code that seems like it should actually do commit tracking properly now
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<jasuarez> jekstrand: half of broadcom CI went down
<jasuarez> i've restarted it , and also restarted some jobs in https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/548020
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<jekstrand> jasuarez: Thanks!
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<zmike> jekstrand: the lavapipe sync rewrite looks ok on a first read but I'm gonna give it a deeper read on monday when I can think thoughts better
<jekstrand> zmike: Cool
<dcbaker> jasuarez: thanks!
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<karolherbst> "SIMD8 shader: 2954 instructions. 1 loops. 36717 cycles. 111:99 spills:fills" => "SIMD8 shader: 2203 instructions. 1 loops. 18063 cycles. 12:69 spills:fills" :3
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<jekstrand> karolherbst: +1. What'd you do?
<karolherbst> jekstrand: higher nir_opt_peephole_select and added nir_lower_phis_to_scalar and nir_opt_phi_precision to my opts
<karolherbst> atm I am reworking my entire pass stuff
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<karolherbst> jekstrand: that stuff runs 10 kernels though and that was the only one hit that big
<karolherbst> ehh there was another
<karolherbst> but this just gets me very close to Intels result
<jekstrand> :D
<karolherbst> got the same amount of points already :D
<jekstrand> \o/
<jekstrand> karolherbst: Are you using the preprocess_nir hook?
<jekstrand> I thought we did a bunch of that stuff in brw_nir_optimize
<karolherbst> only finalize_nir atm
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<karolherbst> or is preprocess_nir something different?
<jekstrand> The intention is preprocess_nir should get run after really early API lowering but before lower_io and friends.
<karolherbst> ahh
<karolherbst> I'll take a look at that then
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<karolherbst> jekstrand: ahh, no, finalize_nir is the same as preprocess_nir, at least iris_finalize_nir calls brw_preprocess_nir
<jekstrand> karolherbst: uh... maybe it does?
<jekstrand> that's a bit weird
<karolherbst> why?
<jekstrand> Well, it's not really how I intended that to be used but I don't really know why Kayden wired it up that way either.
<karolherbst> ahh
<karolherbst> st/mesa does call it a few times though
<karolherbst> but mhh, it gets called after lower_io
<jekstrand> I'd suggest looking at how ANV orders things
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<karolherbst> jekstrand: calling finalize_nir a bit earlier once ineed has a positiv impact on things
<karolherbst> not huge, but at least it improves things generally
<jekstrand> karolherbst: Calling finalize_nir early?
* jekstrand is confused
<karolherbst> from inside rusticl I mean
<jekstrand> Or is gallium's finalize_nir brw's preprocess_nir?
<karolherbst> that but a bit more
<karolherbst> st/mesa tends to call finalize_nir a bit late though (like post linking and most lowering)
<jekstrand> st/mesa also has its own opt loop
<karolherbst> I already looked at that one
<jekstrand> idk. I don't understand the design of the st/mesa NIR bits.
<jekstrand> I've largely avoided them
<karolherbst> I don't think there is a design
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<jekstrand> Exactly!
<karolherbst> there is just stuff happening :p
<karolherbst> anyway, the idea of finalize_nir was to let the driver do optimizations before the nir gets cached
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<karolherbst> okay.. it improved things because it also broke things, weird
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<karolherbst> yeah nice.. I broke llvmpipe :)
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<Kayden> yeah, the design there is a bit maddening, to say the least
<Kayden> st has shader variants with keys, so I think the idea is that there's a finalize_nir for the overall nir, and then one for each variant
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<karolherbst> uhh.. I think that memcpy stuff broke llvmpipe :)
<Kayden> the pass ordering of all those hooks is incredibly fragile, too
<karolherbst> I notice
<karolherbst> something is not right with llvmpipe anyway as the rendering is wrong, but I think it always was like this
<karolherbst> but double conversions are wrong
<karolherbst> so...
<karolherbst> ohh now it's correct
<karolherbst> weird
<karolherbst> anyway opt_memcpy breaks llvmpipe in some weird way
<gawin> did iris get some intentional patches for nine? looking at msgs in git history I haven't spotted anything interesting
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<karolherbst> jekstrand: okay.. one of your memcpy improvements have broken it.. I will try to figure out what exactly it was
<Kayden> karolherbst: just checking...you do have 768930a73a43e48172df00b6c934de582bd9422b in your tree, right?
<Kayden> (it's in main but if you haven't rebased in a while)
<karolherbst> yeah I have
<karolherbst> Kayden: I was talking about the commits in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13166
<karolherbst> not that I want to claim that my nir handling is all perfect, but at least calling opt_memcpy + those three let llvmpipe crash inside the kernels
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<alyssa> anholt: Renewing my nir_lower_xfb experiment
<alyssa> This time splitting out a compute kernel dedicated to XFB, separate from the VS
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<alyssa> This is more complicated but has the potential to actually be conformant. Doing it in the VS without hw support does not, I've concluded
<alyssa> (Too many subtle requirements.)
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<alyssa> imirkin: Does nouveau actually intend to set PACKED_STREAM_OUTPUT, or is that set by mistake? It's not a good thing to set, it's to workaround panfrost's broken XFB (would like to delete it)
<alyssa> zmike: Does zink actually intend to set PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED, or is that set by mistake? It's not a good thing to set, it's to workaround panfrost's broken XFB (would like to delete it)
<zmike> uhhhhh
<zmike> alyssa: what's that one do?
<zmike> I'm not at my brain atm
<alyssa> jenatali: Does d3d12 actually intend to set PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED and PIPE_CAP_PSIZ_CLAMPED, or is that set by mistake? It's not a good thing to set, it's to workaround panfrost's broken XFB (would like to delete it)
<alyssa> zmike: Duplicate gl_Position when gl_Position is written with XFB.
<zmike> yes it's intentional, but I think I can make it conditional
<jenatali> alyssa: if commit history shows I added it, then yes. Otherwise, I have no idea and haven't looked at it
<zmike> which will still make it necessary
<alyssa> The pricinple reason to use it is if you call nir_lower_viewport_transform (you do not) and do non-conformant hacks instead of real transform feedback.
<alyssa> jenatali: will check the blame
<zmike> zink does transforms on position, so the original value is required
<alyssa> right, okay.
<jenatali> Same for us, we do position transforms
<alyssa> So you're really making use of all that infrastructure. Delightful.
<alyssa> Well, I guess it's nice to know lfrb's hard work wasn't for nothing ... a bit bummed I can't delete GLSL compiler hacks though :p
<alyssa> jenatali: fwiw the CAPs blame to "introduce d3d12" so.
<zmike> if it was up to me I'd just require the one-liner extension that would let me avoid it
<zmike> but it's not
<alyssa> which?
<zmike> it's uh
<zmike> EXT...
<zmike> depth...
<zmike> clip_control
<zmike> ?
<alyssa> yeah that sounds right
<jenatali> Yeah I didn't contribute much to that initial check-in, especially around those caps
<jenatali> kusma might know if he's around
<alyssa> Okay, well, it sounds like the common code is i n use for real.
<alyssa> Won't touch it then. Oh well.
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<zmike> it was a good try
<zmike> I'm sure you'll find at least one cap to delete
<alyssa> heh
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<Hello71> has anyone else encountered https://gitlab.freedesktop.org/mesa/mesa/-/issues/6229 with mesa 22 crocus on X? afaict it should affect all glibc users
<Hello71> unless ubuntu did something stupid with their glibc which is also possible
<airlied> Hello71: haven't seen it on fedora 36 at all, should be fairly similiar packaging
<Hello71> unfortunately i don't have any pre-skylake intel gpus to test with
<Hello71> actually i do have several pentium 4s but i'm not sure the bug will manifest on x86-32
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<gawin> I can reproduce on arch with ivy bridge
<gawin> hmm, looks like it's fixed on main branch
<gawin> (or maybe because I did build on my own)
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