ChanServ changed the topic of #dri-devel to: <ajax> nothing involved with X should ever be unable to find a bar
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<graphitemaster> In case people here missed it. I'm trying to reach driver devs with my rant lol
<graphitemaster> Although Mesa is a bit of an outlier because it does a good job comparatively speaking.
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<HdkR> Reads like an ecosystem rant rather than anything directly related to driver problems.
<tleydxdy> if consoles work fine it just sound like the ol "PC is an after thought" problem
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<robclark> it would be sad if vk drivers have to repeat the heroics of working around game/engine issues that gl drivers did.. the right way to do vk is for engines to be designed with vk in mind (rather than translating legacy things incl gl to vk).. rather than making vk drivers solve engine problems
<graphitemaster> you're expecting too much of ports
<airlied> the irony being that one of the proposed adv of vulkan/dx12 was they were more console like
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<Frogging101> I have a texture from a proprietary game that's being generated badly in another frame but I don't know when. How should I capture it?
<Frogging101> I was thinking of hacking renderdoc to start capturing every frame when I press F12 or something
<HdkR> gfxreconstruct would likely be a good choice here since it captures multiple frames
<Frogging101> I'll look at that
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<Frogging101> Is there a tool for going through the contents of these capture files?
<HdkR> gfxrecon-replay, I don't think there is a gui for it
<Frogging101> hmm
<Frogging101> I'm trying to find out when the textures in that buffer get screwed up
<HdkR> I definitely won't say it is an ideal debugger
<Frogging101> Maybe what I can do is go through the API calls from the trace, find interesting frames and use renderdoc to dump them
<Frogging101> I couldn't do this when running the application live because I have no idea what frames are important and they're different every time. But the gfxreconstruct trace will always be the same
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<ayaka_> Does the dri-devel maillist down?
<ayaka_> All the mail I sent to it would be rejected with this error "fp.write(msgsave) IOError: [Errno 28] No space left on device"
<emersion> yes, i'm investigating now
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<ayaka_> thank you
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<ayaka_> btw, I have a pixel formats which would be 5 planes over the max planes in drm
<ayaka_> although the last plane would be the same buffer of the previous buffer, it is something likes meta data in AFBC
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<ayaka_> but I still need to pass the offset and size of the fifth planes, any workaround I could do here ?
<pq> ayaka_, the only advice I can give is do not even attempt any kind of workaround. I cannot imagine that ending well.
<pq> if you really need more than 4 planes over UAPI, that's going to be a big project to roll out to everywhere in the kernel and userspace alike.
<pq> Wayland protocol does not seem to need revising, but e.g. EGL needs a new EGL extension written and advertised.
<ayaka_> pq, luckily EGL won't be a problem, the GPU doesn't support this tiled format nor its compression version
<ayaka_> What I need could be just an extra variable for luma metadata's size
<ayaka_> then the size for chroma could be the total size minus that variable
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<pq> why do you need to deliver the size of chroma data explicitly? can it not be inferred from pixel format, modifier, image dimensions and stride?
<ayaka_> I don't think expand the kernel uAPI could be a good choice, it is a vendor special pixel formats only be supported by its video codecs and display IP
<pq> I don't think any vendor-specific custom abuse of existing UAPI is going to fly either.
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<ayaka_> this pixel format is a little special, its metadata's size depends on the compression radio
<ayaka_> which luma and chroma could use a different value
<pq> Did you already explain what kind of images you need pass around and between which components in an email to dri-devel@? I don't think this is a question that can be answered in IRC.
<ayaka_> that is why we need to tell the decompression device the size of echo planes' metadata
<ayaka_> pq, sorry, I didn't get the full approval to reveal it, we even don't have a vendor modifier registered
<pq> ayaka_, if you can't explain what you want to do, then I don't anyone answer how to implement what you want to do.
<pq> *don't think
<ayaka_> I did explain why, but I can't reveal its real memory layout now
<pq> *I don't think anyone can answer how to implement what you want to do to.
<pq> yeah, so fire off an email with all the info you can expose
<pq> this is a too big question for IRC
<ayaka_> maybe tomorrow, the reason I chose the IRC is that not so many people are looking at it
<ayaka_> and people can't be sure which vendor I am referring
<dolphin> ayaka_: this channel is logged by a bot and the history can be found online
<dolphin> see dri-logg1r
<pq> right, IRC is not any more private than the mailing list, but IRC discussions do get lost very very quickly.
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* ccr looks around for Phoronix spies.
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<tzimmermann> mlankhorst, hi maarten. what's the purpose of the rerere fixup at https://cgit.freedesktop.org/drm-tip/tree/fixups/drm-misc-fixes.patch?h=rerere-cache ? amdgpu remains unbuildable on drm-tip and i suspect it could have something to do with this patch
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<digetx> tarceri: hello, do you think the mesa-db cache is ready for merging or something needs to be improved?
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<jani> tzimmermann: mlankhorst: can you figure out the amd build failure please?
<tzimmermann> jani, well some help from amd would be useful
<jani> tzimmermann: of course
<tzimmermann> i tend towards removing the fixup and fixing drm-tip. even if that breaks amdgpu in some way
<jani> if drm-next, drm-misc-next and drm-misc-fixes are all okay, it's "just" their merge that needs to be fixed
<jani> I guess it's the merging and reverting that got stuff confused
<tzimmermann> we've been doing that for weeks
<tzimmermann> i'll try to backmerge into drm-misc-next
<tzimmermann> maybe that will help
<tzimmermann> the version in drm-misc-next is designated to be the correct one
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<karolherbst> jekstrand, jenatali: so what name should we give the constant/inline/literal samplers? :D
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<tursulin> jani, tzimmermann: imre also reports the following breakage http://gfx-ci.fi.intel.com/archive/deploy/CI_DRM_11953/build_failure.log with a proposed fix such as https://pastebin.com/CM7xuaX0
<tzimmermann> tursulin, imre, for the patch: acked-by: me . this issue comes from recent cleanup of the plane helpers.
<imre> tzimmermann: ok, can send it then. Could you also check https://pastebin.com/r7MPnCiE ?
<tzimmermann> imre, i've no idea about this one
<imre> in drm-tip it caused at least a static redeclared as exported I think
<tzimmermann> imre, note that i did fix amdgpu during the plane-helper cleanup. so what you're seeing might just be another tree-merge problem
<imre> okay
<imre> trying also to include the particular commit IDs
<imre> the above one looks to be 5d945cbcd4b16a
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<emersion> Lyude: i forgot to CC you, but you might be interested in this https://lore.kernel.org/dri-devel/20220801133754.461037-1-contact@emersion.fr/T/#u
<jenatali> karolherbst: I don't really have any opinions, any of them sound fine to me
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<jani> tzimmermann: so there's now a conflict in rebuilding drm-tip?
<tzimmermann> jani, there's no merge conflict. but i think the i915-ttm branch is being merged after drm-misc-next and breaks amdgpu. at least, that's what the diff between the two branches suggests. i'm currently trying to fix this as described in drm-tip.rst
<tzimmermann> my computer is a bit slow, so the rebuild takes time
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<karolherbst> jenatali, jekstrand: I think we should go with "sampler literal" because that's the closest we can get to the official name... but then the OP is called OpConstantSampler :( ahhhhhhhhhh
<karolherbst> why is that so stupid
<jani> tzimmermann: there was a mention on #intel-gfx that drm-tip rebuild now requires a recent dim version to apply fixups that add new files
<Frogging101> What does a barrier do when its srcAccessMask is VK_ACCESS_NONE?
<Frogging101> Nothing?
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<bl4ckb0ne> is it possible to use an EGLimage created from EGL_LINUX_DMABUF_EXT as a cubemap texture?
<bl4ckb0ne> glEGLImageTargetTexture2D is not very happy with the GL_TEXTURE_CUBE_MAP target
<jekstrand> karolherbst: I like inline, myself. Because it's inline in the shader code.
<jekstrand> Constant is really overloaded.
<jekstrand> Maybe not too bad but not great.
<karolherbst> yeah.....
<karolherbst> I also prefer inline, just wondering if coming up with a more official name is worth it
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<karolherbst> will go with inline and if somebody complains in the future we can address it then :D
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<jekstrand> karolherbst: Works for me. I just want us to be consistent and have it documented.
<jekstrand> karolherbst: Maybe put a big comment on the `nir_variable` field tying all the various names together?
<karolherbst> yeah.. something like that
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<ajax> are we branched for 22.2 yet? should we hold back merging things?
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<zmike> I don't think so
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<ajax> to which bit?
<karolherbst> ehhh.. why do I always mess up my rebases :(
<karolherbst> ahh I didn't I am just blind
<zmike> ajax: I don't think branched yet
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<karolherbst> jekstrand: btw.. you meant that sampler struct inside nir_variable_data?
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<jekstrand> karolherbst: ?
<karolherbst> "<jekstrand> karolherbst: Maybe put a big comment on the `nir_variable` field tying all the various names together?"
<karolherbst> just wondering what field you meant here
<jekstrand> karolherbst: Yes, the one inside nir_variable_data.
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<tzimmermann> jani, imre, tursulin, i have recreated drm-tip with a fix for the build problem, again
<tzimmermann> <insert Groundhog Day meme here>
<tzimmermann> there's now a fixup for merging the i915-ttm branch into drm-tip. this tree appeared to be the source of the problem
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<jani> tzimmermann: thanks, appreciated!
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<tzimmermann> fingers crossed that it doesn't break again. if it does, the problem is probably in another tree than i915-ttm
<Lyude> emersion: yes I would be, thanks for letting me know! I'll try to take a look at it at some point today
<emersion> nice :)
<emersion> i'm still not sure how all of that connector registration works
<emersion> especially when it's unregistered but still in use
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<karolherbst> jekstrand: mhh.. your "assert(var->data.mode == nir_var_uniform);" assert is wrong inside var_is_inline_sampler :/ but don't really know a better place to put that in
<karolherbst> could split up the return statement though
<karolherbst> nir_dedup_inline_samplers -> var_is_inline_sampler hits any variable
<jekstrand> karolherbst: Yeah, I thought about doing `if (var->data.mode != nir_var_uniform) return false;`
<karolherbst> could also just move the assert to where it matters
<karolherbst> although I think adding that if is fine
<jekstrand> Yeah, none of this is all that hot
<jekstrand> HdkR: Where are these mmap discussions happening around FEX? I realized yesterday that I actually really want mmap_range to be a thing so maybe I should chime in.
<karolherbst> ehhh.. regressions :( noooo
<karolherbst> ohh.. not using llvm-15 atm
<jekstrand> boo llvm versions
<karolherbst> will works itself out with fedora 37 anyway :D
<karolherbst> ehh.. I am still on f35
<karolherbst> guess I have something fun todo at the end of this week
<jekstrand> I'm on 36, it looks like.
<karolherbst> yay...
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<karolherbst> but there are soo many pieces which need updates: llvm, spirv-tools...
<karolherbst> not sure if we also need a new translator?
<karolherbst> oh well...
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<alyssa> Am I missing something obvious?
<alyssa> it seems like we should have definitely had that pattern, and also that range tracking should've inferred it automatically, and also ...
<alyssa> we optimize (-b2i(x) & 1) but not the simpler (b2i(x) & 1)
<idr> hm...
<alyssa> this pattern came up in lower_idiv, see #6555 for why I'm staring at this evil shader
<alyssa> lot of missing algebraic rules in this shader
<alyssa> `ineg(b2i32(x))` also not getting optimized
<alyssa> relatedly
<alyssa> zmike: kusma: jenatali: zink and dxil have a rule to rewrite b2b32 to b2i32
<alyssa> this seems wrong?
<idr> You might also want to look at my wip/integer-division branch.
<alyssa> eyes
<idr> There's even an issue somewhere about ineg(b2i32(x)) not getting optimized.
<alyssa> delightful
<alyssa> from bugzilla!
<zmike> predates my involvement; resolution: delegate.
<alyssa> idr: I don't understand why that issue (#824) wasn't resolved at the time
<alyssa> `ineg(b2i32(x@1)) -> b2b32(x)` should be safe regardless of when it's run, no?
<alyssa> or does b2b32 not do that?
<idr> I'm trying to remember.
<alyssa> honestly it's hard to tell what b2b32 is supposed to do
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<pendingchaos> IIRC it was up to the driver what b2b32 evaluates to, as long as b2b1(b2b32(x)) works
<alyssa> pendingchaos: delightful
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<alyssa> idr: In much less reasonable patterns,
<alyssa> (('ixor', ('isub', 'a@32', ('b2i32', 'b@32')), ('ineg', ('b2i32', b))), ('b32csel', b, ('ineg', a), a)),
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<alyssa> (reduces this chunky shader another 40 instructions)
<idr> What the what?
<alyssa> which part
<idr> That is a very strange way to do a conditional negate.
<idr> Just when you think you've seen it all...
<alyssa> this is a very strange shader \shrug/
* alyssa vaguely curious what awful GLSL caused this
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<alyssa> (this is from deqp)
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<HdkR> jekstrand: Discussions were mostly just me poking random kernel devs on IRC. I'm not doing any upstream discussion because I can't handle mailing list workflows
<idr> alyssa: Out of curiosity... where does b come from in that conditional negate? (c < 0) by chance?
<alyssa> idr: yes
<alyssa> idr: a < 0, in fact
<idr> Lol
<alyssa> this is a normal way to write abs, don't worry
<idr> Something only a fuzzer could love.
<alyssa> int abs(x) { return (x - (int) (x < 0)) ^ -((int) (x < 0)) }
<alyssa> shader is dEQP-GLES3.performance.shader.operator.binary_operator.div.vertex.highp_int
<alyssa> but the crap is probably from nir lowerings
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<HdkR> jekstrand: https://github.com/FEX-Emu/FEX/issues/1708 Also some additional documentation here on my side
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<jekstrand> HdkR: Well, I'm a big fan of mmap_range()
<jekstrand> It's going to be pretty much a hard requirement if we want to implement SVM and have it work for weird configs.
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<HdkR> jekstrand: I'm also a big fan of _range being glued on to the allocation syscalls
<HdkR> Probably still need the prctl for ioctls allocating memory
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<jekstrand> Sure, but if you've at least got it on mmap(), you can MAP_ANONYMOUS | MAP_POPULATE and get yourself memory.
<jekstrand> Ideally, you'd have it on other things too, though.
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<alyssa> v_color = color;
<alyssa> gl_Position = a_position + u_zero*color;
<alyssa> ok, this is just deqp being mean
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<alyssa> idr: The funny abs is seemingly from nir_lower_idiv::emit_idiv
<alyssa> Can't blame the app :)
<alyssa> blame... uh... LLVM AMDGPU
* alyssa makes that code less creative
<alyssa> less code, too
<idr> I have a bunch of patches in that branch that modify that very code.
* alyssa may have missed those..
<idr> Is this divide by power of two? Or general division lowering?
<alyssa> general division lowering
<idr> Oh.
<idr> All of my stuff was for power-of-two.
<alyssa> "creative"
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<jekstrand> alyssa: That's a lot less code. :)
<alyssa> given that opt_algebraic doesn't chew through that horror show, that should be better for everyone
<jekstrand> alyssa: No idea if it's correct, though.
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<alyssa> jekstrand: i think so but I didn't sleep well last night ;)
<jekstrand> hehe
<alyssa> anyway -- should be better for everyone (fewer instructions, keeping as 1-bit booleans), but especially better for mali
<alyssa> valhall, at least
<alyssa> where bitwise operations are stupidly expensive
<alyssa> in principle we can synthesize fast 1-bit bitwise ops, though lower_bool-to_bitsize makes that nontrivial...
* jekstrand doesn't understand how you make a processor with expensive bitwise ops.
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<graphitemaster> I can tell you for CPU why but dunno about GPUs
<graphitemaster> Those pesky wasted bitwise units turned out to be immensely useful for floats which too much code uses
<jekstrand> I mean, I know HOW you do it. It's just the easiest thing ever to make go fast because there are no dependencies between bits.
<alyssa> 16 FMA + 16 CVT + 4 SFU
<jekstrand> HOW is you put it on a slower clock ^^
<alyssa> the baffling part is why Arm put bitwise ops on the special function unit instead of the conversion unit
<graphitemaster> I'm still salty about how fast shifts were on the Pentium 4 and how slow they are today in comparison :(
<alyssa> Admittedly Mali doesn't have plain bitwise ops, which is part of the problem
<alyssa> ~((a ^ ~b) >> c)
<alyssa> ^ that's the same op as (a ^ b), because of course it is
<graphitemaster> So wait, why is integer abs so hard to do lol, isn't it just: (v + (v >> 31)) ^ (v >> 31)
<graphitemaster> Or is the shift the problem ?
<alyssa> graphitemaster: Hmm?
<graphitemaster> mask all 1s if sign bit set, arithmetic shift for sign extension, so mask is -1 or 0 according to sign bit then xor
<alyssa> i'm confused what you're responding to
<alyssa> IABS.s32 is on the CVT unit, it's fast
<alyssa> (valhall)
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<alyssa> there are lots of things on CVT that are internally bit twiddling
<graphitemaster> I was looking at the patch that converted a horrible iabs implementation into something else that wasn't as efficient XD
<alyssa> yeah, my patch
<alyssa> how is that the case?
<alyssa> in the worst case, for a gpu where that awful thing is the efficient impl... that's what the backend isel will lower iabs to
<graphitemaster> oh i see
<graphitemaster> there is a nir_iabs
<graphitemaster> makes sense okay
<graphitemaster> the (x - (int) (x < 0)) ^ -((int) (x < 0)) thing is insane tho
<alyssa> 100%
<alyssa> creative, you mean
<graphitemaster> not as creative as (v + (v >> 31)) ^ (v >> 31) xd
<graphitemaster> but i guess < is faster than >> on gpus
<graphitemaster> *cries*
<alyssa> with that patch, down another ~40 instructions...
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<alyssa> still SFU bound somehow
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<alyssa> oh, the XOR can't be folded in, only AND and OR.
* jekstrand is very confused by this ^
<alyssa> jekstrand: which part
<jekstrand> Trying to grok your patch
<alyssa> oh
<alyssa> good luck
<alyssa> jekstrand: I recommend against being too clever and instead just considering the cases
<alyssa> looking at the old code and considering lh_sign as < 0 and not respectively and tracing what values you get
<jekstrand> alyssa: Yeah, I'm getting it now
<jekstrand> woof
<alyssa> correct
<alyssa> I am genuinely unsure how anyone came up with the old impl
<alyssa> llvm people..
<jekstrand> Yeah....
<jekstrand> I mean, I could see wanting to eliminate the `bcsel` but meh[6~
<jekstrand> *meh
<jekstrand> On Intel, you're goint to get basically optimal code with your patch.
<iive> what is this formula supposed to do?
<jekstrand> abs(x) = x - (int) (x < 0)) ^ -((int) (x < 0))
<jekstrand> Which gets it for you without any branching but woof
<alyssa> that's what backend isel is for
<jekstrand> Yup
<alyssa> i'll keep my nir_op_iabs thanks
<jekstrand> For that matter, all hw has a bcsel which doesn't do any actual branching. There's literally no point.
<jekstrand> Maybe for an exceptionally dumb compiler that's trying to add branchs
<iive> how about max(v,-v), in case there is direct min/max int op?
<jekstrand> iive: You can emit that in your back-end when you see `nir_op_iabs`
<alyssa> jekstrand: what about a RISC-V gpu?
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<jekstrand> alyssa: I don't care about a RISC-V GPU
<alyssa> I guess it should just take SPIR-V in instead, and SPIR-V has a fast bcsel. Nvm.
<jekstrand> alyssa: Yup, that ^^
<jekstrand> :-P
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<jekstrand> alyssa: Anyway, that patch is RB me.
<alyssa> thanks. it's not tested ;)
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<Sachiel> testing is done by the masses after you merge it
<jekstrand> alyssa: I'm going to build it and kick to Jenkins now
<jekstrand> Maybe I'll even throw CL idiv tests at it
<alyssa> speaking of, does anybody care if I steal bool_to_bitsize from common the bifrost backend?
<idr> alyssa: That patch looks correct by me. I'm going to be out next week, so I'll give my R-b now.
<alyssa> etnaviv is the only other user I see, but etnaviv doesn't do fp16 afaik, so I think it meant to just use bool_to_int32?
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<jekstrand> alyssa: I'll also do a shader-db run. TGL doesn't have integer divide, IIRC.
<alyssa> :-D
<alyssa> for context -- lower_bool_to_bitsize is almost never what you actually want
<jekstrand> No, it's DG2 that's missing it.
<alyssa> bifrost is just extra special
<alyssa> Oh. Integer multiples are SFU. Right. Fine.
<alyssa> wq
<jekstrand> And... gotta figure out how to run shader-db again...
<jekstrand> idr: Any idea why intel_stub_gpu doesn't work on DG2?
<idr> jekstrand: No clue.
<idr> "Reasons"
<jekstrand> Probably not returning any memory info
* jekstrand doesn't feel like fixing that today
<idr> I keep meaning to dig into it... then decide to do something else.
<jekstrand> jljusten: ^^
<jekstrand> I've hacked up brw_nir.c to run lower_idiv on TGL. Good enough. :)
<idr> I think I had some patches that fixed some problems, but they weren't enough.
<idr> And at that point DG2 wasn't fully public, so they're probably rotting somewhere...
<alyssa> ...and I just realized I've been using the wrong email address in git all day
<alyssa> oops
<jljusten> jekstrand: I was having some trouble with INTEL_DEVID_OVERRIDE on dg2 recently. (At least on vk.) I think mmap was failing, which sort of makes sense.
<alyssa> jekstrand: force pushed to your MR to fix my email
<jekstrand> jljusten: Likely the problems are similar but intel_stub_gpu is an entirely different path
<jekstrand> jljusten: We should probably torch INTEL_DEVID_OVERRIDE, TBH.
<jljusten> jekstrand: We sort of go down the no_hw paths, and then avoid reading region info and then try to use the old buffer paths.
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<jekstrand> alyssa: Well, good and bad news: It affects 10 programs in shader-db.
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<alyssa> ...Do I have a bigger shader-db than you?
<jekstrand> You have a different shader-db
<alyssa> fair
<jekstrand> Also Intel does really dumb things with the generated code. IDK why yet
<alyssa> right, yes
<alyssa> 100% of the affected shaders are closed android
<alyssa> which means 100% of your affected shaders are closed linux, I guess?
<jekstrand> yeah
<jekstrand> And now I'm trying to figure out if any of this is correct for INT_MIN
<jekstrand> Because iabs(INT_MIN) = INT_MIN
<alyssa> bahh
<jekstrand> But that's fine, I think.
<jekstrand> INT_MIN = 1 << 31, right?
<alyssa> umm
<alyssa> signs point to yes
<jekstrand> Yeah
<jekstrand> So it's fine
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<jekstrand> It's just annoying because we really do need a u2f and we can't get by with an i2f
<jekstrand> Intel back-end CSE sucks
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<jekstrand> Or maybe we just need to run it later?
<alyssa> Hm?
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<jekstrand> I'm getting redundant iabs in the back-end
<jekstrand> Which is a large part of why it's not actually helping. :-0/
<jekstrand> :-/
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<alyssa> Oh.
<alyssa> meanwhile idiv_const is hurting shader-db.. wondering why
<alyssa> ah, this shader is using the celebrity divisor of 7
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<alyssa> okay excuse me
<alyssa> first the shader multiplies by 7
<alyssa> then it divides the product by 7
* alyssa smacks head
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<jekstrand> woo
<alyssa> if only i had nsw set on the multiply we'd be in business
<alyssa> unfortunately this is GL land
<alyssa> and according to the GL spec..sigh
* jekstrand is very confused as to why the back-end can't CSE this
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<jekstrand> Because the back-end aparently can't CSE MOVs....
<jekstrand> Wow
<jekstrand> How'd we miss that one?!?
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<jekstrand> Hrm... right... CSE inserts MOVs and we don't want it to fight with itself.
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