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<Lynne> I don't think writing an implementation just with the nvidia drivers would've been doable
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<Lynne> now more than ever, the spec is vague on what structs you need, their drivers are not robust at all and seem to have their own spin on the spec
<Lynne> if I could only look at where I crash, I'd figure out where the segfault is and fix it
<Lynne> but I lose all framing in libnvidia-eglcore.so
<airlied> Lynne: I assume the nvidia ppl writing their samples have access to thier internal src
<Lynne> "samples"
<Lynne> I can't believe zlatinski called that repo a sample
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<Lynne> it hides everything away from the actual API into a C++ soup
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<Lynne> and I mean everything, it half-wraps the API in its own c++ wrapper for no good reason but to obfuscate
<airlied> yeah I tried to work with it for a while to add radv support paths and have up
<airlied> gave
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<Lynne> second day of trial and error, re-reading the spec over and over, I think I'll have to break out a sheet of paper and write it explicitly
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<Lynne> replicated their encode_info struct, no cigar
<Lynne> "Access not within mapped region at address 0x28"
<airlied> NULL ptr deref ftw
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<Lynne> welp, that's disappointing, I made sure to replicate everything as-is
<Lynne> but no, still segfaults
<Lynne> maybe they haven't updated their driver for the new API and still have leftovers in the encoding section
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<jekstrand> airlied: Ok, I'll take a look at some point but no guarantees it'll be in 2022
<airlied> Lynne: you setting up the parameter sets the same?
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<Lynne> airlied: yeah, they're really barebones on their program too
<Lynne> just quantizers, everything else zero
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<airlied> Lynne: though a NULL ptr deref there could also be a pNext fail
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<airlied> Lynne: btw do you have an example vaapi h264 encode ffmpeg commandline? I'd like to be able to get some hw traces from it
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<Lynne> sure, "ffmpeg -vaapi_device /dev/dri/renderD128 -i TEST_BDMV.nut -vf format=nv12,hwupload -c:v h264_vaapi -q:v 30 -an -sn -y test.ts"
<Lynne> no hwdecoding, so you should get a cleaner trace
<Lynne> test.ts, instead of mkv, because vaapi has some really annoying issues with global vs in-stream sequence params, where some drivers support it, and some don't
<Lynne> amd for some reason doesn't
<Lynne> thankfully vulkan will fix that :)
<Lynne> indeed, we're doing important work here, making hwencoding actually work consistently
<Lynne> the fact that the segfault happens at 40 bytes is suspicious
<Lynne> it's not .pNext, because otherwise it would be 12ish bytes
<Lynne> I'm guessing the driver does a pNext search, it returns NULL, and it carries on regardless
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<Lynne> btw if you'd like keyframe-only captures, add -g 1 -keyint_min 1 -vframes N after -q:v 30, where N is however many frames you want
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<alyssa> Test case 'dEQP-GLES3.functional.shaders.keywords.reserved_keywords.image1DShadow_fragment'.. Fail (expected compilation to fail, but shaders compiled correctly.)
<alyssa> dEQP is... delightful...
<alyssa> I think this is just a broken teset.
<alyssa> test
<alyssa> Oh. CTS commit 99df4bc2 ("Remove invalid reserved keywords tests")
<alyssa> just need to rebuild, ok
<mareko> alyssa: why does panfrost require index bounds?
<alyssa> mareko: ugh.
<alyssa> because older Mali hardware is broken by design.
<alyssa> utgard (lima), midgad
<mareko> can't you just set 0 and ~0?
<alyssa> rNo.
<alyssa> No.
<alyssa> On Midgard (e.g. Mali-T860), the vertex flow looks something like:
<alyssa> 1. Vertex shaders run in a compute-like environment, writing out varyings to a buffer in main memory that the driver provides
<alyssa> 2. Tiling happens, reading e.g. gl_Position from that buffer
<alyssa> Vertex shaders are invoked (max_index - min_index) times
<mareko> fun
<alyssa> running once for each possible value of the index buffer
<alyssa> genuinely.
<alyssa> if you set bounds of 0/~0, the driver would try to allocate hundreds of gigabytes of space for varyings
<alyssa> and the hw would try to execute the VS billions of times
<alyssa> so instead we have to scan the index buffer and use that to bound the VS
<alyssa> if the index buffer is {1,2,1000000000000}
<alyssa> well, it sucks to be you.
<mareko> or trust the app
<alyssa> right
<alyssa> i suspect glDrawRangeElements was added due to Mali lobbying
<mareko> it's much older than that
<alyssa> but don't care to dig through KHR history to find out
<alyssa> no?
<alyssa> this bad design goes all the way back to utgard days
<alyssa> i.e. what lima supports
<alyssa> from mid-2000s
<alyssa> range elements was only added to gles in ES3.0
<alyssa> which is much newer than what utgard/lima can do
<Lynne> airlied: welp, I'm pretty sure nvidia's new drivers are faulty, decoding used to work, but now there's a freeze
<alyssa> (utgard doesn't have a ton in common with newer Malis, but this nonsense is in both)
<alyssa> Arm *finally* fixed this with Valhall
<alyssa> but that's 2021 era hardware
<alyssa> and between lima and panfrost, we get to deal with 15 years of older Malis that need index buffer scans (-:
<alyssa> on GL we can get away doing it on the CPU and caching the answer and it's mostly fine
<alyssa> on VK we can't
<alyssa> which in itself makes me want to say "no Vulkan on anything pre-Valhall"
<alyssa> panvk is in tree targeting bifrost but not conformant and mostly an experiment at this stage
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<alyssa> and yes, indexed draws are broken in panvk, and no, there's not a good way to fix it
<alyssa> (there's an MR somewhere doing the index buffer scan in a compute kernel and doing an indirect draw. I said *good*.)
<alyssa> ...Anyway, why do you ask
<mareko> glDrawRangeElementsEXT was added in 1997
<alyssa> O_O
<alyssa> I see. OK.
<alyssa> an ext so old there's no attribution on it, wow.
<mareko> u_vbuf uses it to determine how many vertices to upload from non-VBO vertex arrays to BOs, the uploaded range is always min_vertex..max_vertex unless the vertices are too sparse, in which case u_vbuf lowers the draw to non-indexed
<alyssa> OK
<mareko> so that we don't spend several seconds doing memcpy of the whole vertex range to a BO
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<Lynne> oh no, I just realized, devices can have multiple QFs with the encode capability
<Lynne> and each QF may support a different codec
<Lynne> welp, I'm not implementing this until I see drivers expose it like this
<airlied> Lynne: just fyi I have an enc branch that does nothing, just letting you know that I am typing :-P
<airlied> my rough plans will be kicking it a bit tomorrow, 28th-30th, then offline until Jan 10th
<Lynne> yup, verified, that is indeed typing :)
<Lynne> my plan is to polish my branch tomorrow and make it at least compliant with the spec with no regard for nvidia (until they fix their driver)
<Lynne> hopefully we can get it running in the few days before new year's
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<alatiera> DavidHeidelberg[m] got links for the dns issues and how reproducible are they
* alatiera found the MR
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<DavidHeidelberg[m]> alatiera: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7815#note_1696100 but I see only one failure there :(
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<mareko> how do I change my ssh key on people.freedesktop.org?
<mareko> I'll create an issue
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<ondracka> Is drm-shim supported for i915? If so how do I make it work, I tried LD_PRELOAD=/path/to/libintel_noop_drm_shim.so MESA_LOADER_DRIVER_OVERRIDE=i915 but that doesn't seem to be enough.
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<lina> Re !20397, I apparently could kick the CI myself but I don't have the power to merge it (I think?)
<lina> Are all the manual action CI pipelines are supposed to run for every MR?
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<jenatali> lina: Merges are done by assigning to Marge bot, which will rebase + add a link to the commit, run CI, and merge upon success
<jenatali> Assigning, like merging, requires developer permissions in the project
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<hays> is this the right place for this question? mpv is using a kms driver to play a video and the driver is bumping the resolution of the dispkay too high [vo/gpu/opengl/kms] Selected mode: 3840x2160 (3840x2160@60.00Hz)
<hays> is there a way to set a lower resolution
<linkmauve> hays, in mpv’s man, I see --drm-mode=<preferred|highest|N|WxH[@R]>, you can describe your mode that way.
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<DavidHeidelberg[m]> lina: can you put R-bs into commit?
<linkmauve> DavidHeidelberg[m], did you succeed after rebuilding apitrace, libepoxy and GTK btw?
<DavidHeidelberg[m]> linkmauve: I didn't got to it yet, I'm at currently coredump + gdb for Mesa CI :)
<DavidHeidelberg[m]> we need to get https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 this fixed for removing more GLX deps :D
<linkmauve> You could use Wayland instead.
<DavidHeidelberg[m]> linkmauve: no no, that's not the issue. The issue is that even on Wayland, Firefox and GTK has to keep glx calls to get the right information.
<linkmauve> Ah, you want to eliminate GLX usage from all clients?
<DavidHeidelberg[m]> To get rid of it, it has to be able to use EGL under both X11 and Wayland to avoid using glx calls.
<linkmauve> Right.
<DavidHeidelberg[m]> linkmauve: yeah, that's exactly why I'm having issue with tracing gtk4 apps as you had with both glx and egl enabled.
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<hays> linkmauve: thank you!
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<alyssa> who wants a mesa/st bug? I want a mesa/st bug!
<alyssa> oh, not a bug
<alyssa> just the most subtle brokenness I can imagine
<alyssa> khronos side not us
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<mairacanal> danvet: any chance you could take a look at https://lore.kernel.org/dri-devel/20221219120621.15086-1-mcanal@igalia.com/? it is a series for that debugfs clean up TODO
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<danvet> mairacanal, looks very nice
<danvet> mairacanal, did mripard say whether he'll apply the entire pile, or do I need to do that?
* danvet once more way behind mailing lists
<mairacanal> I'm not sure if he is going to apply it, he didn't mention it
<javierm> mairacanal: if he reviewed the series already, you could also apply it
<mairacanal> I was waiting on some feedback from danvet, as he proposed this idea on the TODO, but I can apply it as well
<danvet> oh if you can push, let me ack the remaining pieces real quick
<danvet> mairacanal, I dropped some acks/reply onto the series too
<mairacanal> thanks danvet
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<DemiMarie> alyssa: Is it possible to have a compute shader determine what draw calls to make?
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<javierm> do you know if Mario Limonciello is on irc ?
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<tjaalton> javierm: superm1, but probably not online before next year
<javierm> tjaalton: ah, because he sent a patch-set like an hour ago and thought that discussing here would be better for that reason too
<tjaalton> oh :)
<javierm> tjaalton: but I'll then answer in the mailing list :) thanks!
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<Lynne> airlied: updated my repo with what I think is a more-or-less valid encoder
<Lynne> the only struct you'll need from the RC mess is VK_STRUCTURE_TYPE_VIDEO_ENCODE_H264_RATE_CONTROL_LAYER_INFO_EXT, as that one contains the quantizers
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<airlied> Lynne: okay give me a command line to make the vulkan encoder do something :-)
<Lynne> "./ffmpeg_g -init_hw_device "vulkan=vk:0,debug=1" -i ~/SAMPLE_720P.nut -loglevel debug -filter_hw_device vk -vf format=nv12,hwupload -c:v h264_vulkan -vframes 1 -y TEST.mkv"
<Lynne> validation layer will complain you're using queries in a non-general queue, but validation layers don't read specs yet
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<Ristovski> Does the TTM page pool make a distinction between dedicated GPU memory and APU memory (aka system ram on APUs)?
<Ristovski> as in, does it change its caching algo based on that
<Ristovski> also I dont get why the unused ttm page pools dont count towards "buff/cache" as opposed to being blackholed (and users going "huh? where is my ram going?") Is there some reason for that?
<Ristovski> (in reality, its right there, and visible after you trigger several _thousand_ releases by poking /sys/kernel/debug/ttm/page_pool_shrink :/)
<airlied> Lynne: yay first hw hurdle, I've no idea how to implement the encode query :-)
<Lynne> yup, that's what I thought
<Lynne> hw hurdle?
<Lynne> does the hardware not supply any info on how large an encoded slice was?
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<airlied> I don't have any info on the hw supplying anything
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<airlied> it has feedback and stats
<airlied> but what feedback is I've no clue
<airlied> stats doesn't seem relevant
<danvet> mairacanal, btw arnd doesn't have commit rights, so if you review a patch feel free to also apply it
<danvet> otherwise they tend to get lost
<airlied> Lynne: might be the right values in feedback just not sure how to wire them up to the query
<Lynne> I do think they abused the query system somewhat
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<airlied> Lynne: so info->pSetupReferenceSlot->pPictureResource is NULL, is the correct?
<airlied> oh it can be NULL, I wonder what that means
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<Lynne> no refs?
<Lynne> oh, uhh
<Lynne> git add -p messup is what it means
<Lynne> fixed
<Lynne> (no, it didn't fix nvidia, I did test it there)
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<airlied> Lynne: cool onto my first GPU hang :-)
<Lynne> think of it as your first submit!
<mlankhorst> /3
<mbrost> new Intel GPU driver, Xe, initial posting: https://patchwork.freedesktop.org/series/112188/
<demarchi> \o/
<mlankhorst> \o/
<Lynne> airlied: I'll take a look at wiring over VK_QUERY_TYPE_RESULT_STATUS_ONLY_KHR in radv during the holidays for decoding
<Lynne> not that useful to know whether a frame you decoded 30 frames ago is valid or not
<Lynne> but it's for completion
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<HdkR> mbrost: Oh cool, new drm interface to run through my verifier
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<HdkR> mbrost: Before I run it through my verifier, I notice the uapi has some unions between handles and pointers. How does it know handle versus pointer?
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<mbrost> HdkR: what is the verifier? union fields are usually determined via the opcode of the IOCTL
<mbrost> let me give you an example real quick
<HdkR> mbrost: Personal project that checks that struct packing matches between bitness and architectures
<mbrost> drm_xe_vm_bind_op.userptr vs obj_offset
<mbrost> if op == XE_VM_BIND_OP_MAP_USERPTR, userptr is used
<HdkR> Ah okay, so not a bitness difference, just depends on the operation.
<mbrost> if op == XE_VM_BIND_OP_MAP, obj_offset is used
<mbrost> same field but for clarity use a union there
<mbrost> maybe it isn't clear? everything in uAPI subject to change at this point
<HdkR> No that's clear now that you said its tied to the op
<mbrost> one more example, drm_xe_vm_bind
<mbrost> vector_of_binds vs. bind, if num_binds == 1 use bind, great than 1 use vector_of_binds
<mbrost> if it isn't clear in the comments, give us feedback and we will update them
<HdkR> The one that caught me was drm_xe_sync since handle didn't have a comment on it
<mbrost> yea we definitely need to do a bit of work on the doc, goal is to have kernel doc for everything by the time this gets accepted upstream
<mbrost> gotta run, done for a couple of days for holidays, entire Intel Xe team has some celebrating to do after this public announcement
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