<DavidHeidelberg[m]>
airlied: Hey. Btw. what is your opinion on using SPDX only headers?
<airlied>
DavidHeidelberg[m]: yeah I think I'm good with it, at least I think RH lawyers are since we do it for the kernel :-P
<DavidHeidelberg[m]>
airlied: I'm not sure if there is any consensus within the Mesa, but pushing big license headers into each file seems to be a bit overkill when opening and reading them
<DavidHeidelberg[m]>
Does anyone run the deqp against NVIDIA binary? I'm mostly interested if dEQP-EGL.functional.choose_config passing.
<DavidHeidelberg[m]>
jekstrand: ^ ?
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<Lynne>
and nvidia's driver is such a black box it sucks all light out of a system, sometimes literally
<Venemo>
:(
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<Lynne>
well, I did find a validation layer bug
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<lina>
DemiMarie: I think that would make sense if this were a generic API intended to be used with arbitrary IOMMUs by arbitrary drivers, but it's not. In this case it's just a page table management backend used directly by IOMMU drivers, and downstream clients use higher-level APIs. I just use it in my driver because this GPU happens to use an MMU that is very similar to SMMU.
<lina>
It's kind of up to interpretation, but in my view the IOMMU driver / subsystems are responsible for safety, and in this case that's actually the GPU driver itself.
<lina>
The VM management in my driver then both does the unsafe action of installing the page tables, and exposes safe mapping functions to the rest of the driver that take scatter-gather tables (which themselves keep the GEM object backing them alive and are guaranteed to point to valid physical pages), and track VM address space and return mapping objects that keep those SG tables and therefore physical
<lina>
allocations alive as long as the mapping is live in the VM
<lina>
That also keeps the VM alive itself, which is important because apparently this GPU can't cancel jobs so if you kill a process using the GPU, all that plumbing has to stay alive until the job actually completes even if the DRM file already went away.
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<jekstrand>
airlied: Scanning through it now.
<jekstrand>
DavidHeidelberg[m]: IDK. My blob box is off right now.
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<DemiMarie>
lina: I really hope instruction-level (or at least bounded-latency) preemption becomes standard for GPU drivers. It’s the only way GPUs can become secure multi-user compute devices.
<jekstrand>
That's going to be a while.
<jekstrand>
airlied: Gave you some real review.
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<DavidHeidelberg[m]>
After the new year?
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<DemiMarie>
What is the usual process for dealing with kernel driver problems that are blocking a particular downstream project? marmarek found a bug in i915 that makes Qubes OS unusable on Alder Lake.
<DemiMarie>
Both he and I tried to fix the bug and failed.
<emersion>
you can also ask questions on #inel-gfx
<emersion>
err, #intel-gfx
<DemiMarie>
emersion: already done, but no fix yet, and this is a release-blocker
<emersion>
you can always indicate that this blocks your project in the issue, but that doesn't really change anything
<emersion>
if you want to be unblocked, the only reliable way is to do it yourself
<bnieuwenhuizen>
if this is a regression it might help to work around by bisecting and reverting
<emersion>
right, a regression would be easier to argue for a revert
<emersion>
and bisecting helps debugging regardless
<DemiMarie>
emersion: is that why you became a kernel developer?
<emersion>
lol
<emersion>
kind of -- i just hit a bug i found a solution to ;)
<emersion>
you're on that path as well :P
<pcercuei>
Knowing the offending commit is half of the job, so if you can at least bisect it, chances are that it can be fixed quickly
<DemiMarie>
Does i915 share page tables between the CPU and the GPU?
<DemiMarie>
Or otherwise make intentional assumptions about how CPU page tables are layed out?
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<mattst88>
DemiMarie: if no one is responding, I've found that bisecting and sending a revert of the offending patch often gets someone's attention :)
<DemiMarie>
mattst88: the problem is that the offending patch is the one that introduced support for the hardware in question
<emersion>
no hardware support means no possible bug!
<marmarek>
well, with no support in i915, it AFAIR uses efifb and it does work correctly (unless you want, idk, change resolution or something ;) )
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<Lynne>
airlied: typing going alright over there?
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<psykose>
gotta take breaks
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<DavidHeidelberg[m]>
jenatali: Hey hey. DNS issues in the house again with harbor + Windows + Docker :(
<jenatali>
That's for alatiera and daniels
<DavidHeidelberg[m]>
Ok, I'll put the farm for now down, and ping alatiera (as we did now, but also in MR). Daniel is on vacation
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<jenatali>
Alright. I'm also on vacation which means I care a little bit less, but I always get scared when that CI gets disabled
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<DemiMarie>
<DavidHeidelberg[m]> "jenatali: Hey hey. DNS issues in..." <- Windows?
<airlied>
Lynne: encode just keeps getting distracted from :-P, I expect holidays will keep me from winning
<airlied>
Lynne: I've also little to no idea what bits of the API need to write to what bits of the hw yet
<jenatali>
Demi: yes, Windows
<DavidHeidelberg[m]>
Demi: hmm? CI runners having problems to resolve DNS (the described combination)
<airlied>
though today is a sitting in the car service play day, so maybe more typing, but have lots of decode cleanups to do first
<DemiMarie>
jenatali: who is running Windows?
<jenatali>
I am, among others
* jenatali
works for Microsoft
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<DemiMarie>
jenatali: okay, fair, though I am curious why you are in this room 🙂. Do you work on the graphics stack as a hobby, or is it part if your job?
<jenatali>
Demi: Microsoft maintains a gallium backend in Mesa for layering on D3D12, like Zink. We're also building a Vulkan driver to do the same
<jenatali>
We also use both of those for WSL (Linux running in a tightly-integrated VM on Windows)
<DemiMarie>
jenatali: Any updates on the kernel driver?
<jenatali>
"the kernel driver"?
<jenatali>
Oh upstreaming the dxgkrnl driver. We've paused that effort for the moment
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<Lynne>
airlied: I think if you just need to use the same hooks as vaapi, as the APIs are remarkably similar
<Lynne>
vaapi has the same model where you create buffers from sequence units, vulkan is a bit higher level by just exposing them as a video session rather than as buffers you have to allocate yourself
<Lynne>
both APIs let you feed a frame and specify the number of output slices
<Lynne>
both APIs use more or less the same structures to describe frames and references
<Lynne>
I'm guessing the encode spec was written by either Intel and/or AMD while decode was nvidia's turf
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<robclark>
lina: panfrost has an mmu that uses same pgtable format as SMMU.. and adreno (msm) basically has an SMMU instance all it's own to be it's MMU but doing things that don't at all fit into the dma api framework.. (OTOH I agree that gpu drivers need to do things that shouldn't really be forced into iommu/dma framework)
<DemiMarie>
<jenatali> "Oh upstreaming the dxgkrnl..." <- What was the reason for that?
<jenatali>
Demi: Not really sure, I wasn't really involved
<airlied>
jekstrand: pushed a patch attempting a macro to that MR, on the fence on whether it's a win :-P
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<airlied>
jekstrand: actually I reread the spec so I'll rewrite some of the code, but not sure it'll be less or more ugly
<jekstrand>
heh
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<airlied>
Lynne: you know VPS sets for HEVC decode? I don't think I have them wired up but just wondering if we missed them
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<Lynne>
airlied: no, I set them
<airlied>
Lynne: doh I should probably take some info from them :-P