<eric_engestrom>
DavidHeidelberg[m]: not aware of anything with the rpi farm, and looking at the jobs that didn't boot, I don't see any pattern (different devices, on different runners)
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<karolherbst>
vtcon1 doesn't exist anymore
<karolherbst>
or rather.. not on my system
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<javierm>
karolherbst: what do you have in /proc/fb ?
<karolherbst>
fb0 and fbcon
<karolherbst>
ehh
<karolherbst>
0 i915drmfb
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<mupuf>
Ha, yes. Already rebooted it and restarted the jobs that were failed to please marge
<daniels>
ah thanks, unfortunately too late for re-enabling LAVA
<digetx>
tzimmermann: I've fixed the missing drm-shmem resv lock that was triggering the Intel CI last week https://lore.kernel.org/dri-devel/20230305221011.1404672-2-dmitry.osipenko@collabora.com/ the dmabuf->attach()->drm_gem_pin() path was missing the lock; in the past versions I had drm_gem_pin() to take the lock, but it was causing unsolvable issue for i915 and we (Christian) decided to let exporters to handle the lock themselves; some more
<daniels>
anholt_, robclark: chezas 5, 7, 10, 11, 13, and 15 are all marked as paused - are they supposed to be held back or should they be working?
<daniels>
(I noticed because a630 was backed all the way up, which seemed not unrelated to people running a630-vk-full on them by triggering all manual jobs - maybe just tag a couple of the runners with a630-vk-full and make the job require that tag, so we don't block pre-merge runs when that happens?)
<dcbaker>
kisak: it causes a ton of regressions on virgl iirc
<dcbaker>
I Can look more when i get into the office
<kisak>
ah, that's a good enough reason for me.
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<robclark>
daniels: I think there were some that were paused due to being flaky but didn't realize it was that many.. maybe we should give a different tag instead of pausing them so that we could try to run jobs on them?
<daniels>
robclark: sure, I could rename them as mesa-freedreno-cheza-naughtystep and we could hit them with a --stress run?
<robclark>
yeah, seems like a good idea
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<daniels>
1 and 7 don't even have a cpu-uart device, so that's not super promising
<MrCooper>
who needs a CPU or UART anyway
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<daniels>
robclark: 5, 13, and 15, can't get network; 11 might have bricked storage (EC works fine, CPU never emits anything from the UART); 10 just stays in some kind of type-C negotiation death spiral
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<daniels>
so yeah, atm we only have 7 running chezas ...
<daniels>
would it be better to try to move testing to either a630 or 660?
<robclark>
it would be great to have some a660 runners.. since both a630 and a618 are a6xx gen1 and we'd like to have some a6xx gen4 coverage in CI
<robclark>
but I think we don't have hw for that
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<robclark>
anyone know what compiler and version is used in debian-arm64 / debian-arm64-release build jobs?
<daniels>
ok, lemme chase up a660 enable then
<daniels>
robclark: C compiler for the host machine: ccache cc (gcc 10.2.1 "cc (Debian 10.2.1-6) 10.2.1 20210110")
<daniels>
the Meson configure output is collapsed by default in job logs, but if you expand it it'll tell you
<daniels>
C linker for the host machine: cc ld.gold 2.35.2
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<robclark>
ahh, I see it now.. gcc version is what I was after
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<daniels>
but yeah, I think we need to do something about a630 coverage, because right now fdno MRs launch 12 a630 jobs on 7 DUTs :\
<robclark>
we in theory have some more boards we could add.. I guess we could try to swap the bad boards?
<robclark>
it isn't ideal but last I looked we still weren't the long pole
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<daniels>
yeah, if you have some spares, then you can swap out any/all of 1, 5, 7, 10, 11, 13, 15 ;)
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<anholt_>
daniels: do we want to do that to lava, as well? Even if you've got priorities, someone clicking some manual runs (me, doing a morning round of ci checking on various MRs) during a lull would hopefully not block merges (later on as the north america day gets going). Right now I stagger my submissions, but tags would let me not do that.
<daniels>
anholt_: yeah we definitely do ... I know LAVA upstream completely changed how they do device aliases a while ago and it's not super straightforward atm
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<daniels>
just aliasing tags on the gitlab-runner side wouldn't work given that we only register one instance per device type, and scale the parallel on the client side according to how many devices are available rn
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<daniels>
robclark: any idea if a660_zap.mdt is redistributable yet?
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<robclark>
daniels: I don't see it in upstream l-f so it might not be
<robclark>
daniels: maybe lumag might know what it would take? I think linaro has been pushing fw for SoCs that are in 96boards things, but not sure if there is anything w/ a660..
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<daniels>
ack, thanks
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<HdkR>
I would love to see day-0 support for snapdragon in both the firmware repo and upstream kernel. :)
<HdkR>
If I reiterate it enough, maybe it'll eventually happen.
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<robclark>
(CI is telling me that I'm missing some step to get python3-lxml into all the needed containers..)
<lumag>
daniels, the problem is that the zap.mbn/mdt is signed by the vendor of your board
<lumag>
so you can not just copy it from one board to another
<robclark>
lumag: I guess daniels is talking about intrinsic or similar board.. which I guess probably use the test-key signed fw
<lumag>
daniels, check your inbox please
<lumag>
yeah. They can be signed by any key
<lumag>
but we do not have an ODM who would license this file for redistribution
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<lumag>
robclark, if we put the signatures aside, can you write the zap shader?
<robclark>
as in, my own implementation.. yeah, I guess in theory.. if tz doesn't check the signature.. maybe an empty file with whatever signing hearer/footer would work?
<robclark>
it's really just some sqe code with some embedded cmdstream and shaders
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<lumag>
robclark, you or any other mesa / freedreno expert :D
<robclark>
well, we have an assembler/disassembler for it at least
<robclark>
I guess writing our own might be a way to unblock adding CI runners (where, I think daniels concern is that we don't really have a mechanism to _not_ redistribute the fw)
<lumag>
well, if we had one, we would have been completely unblocked
<lumag>
(one = ZAP written from scratch)
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<daniels>
robclark: ours is the 888
<daniels>
...
<daniels>
is the HDK
<daniels>
robclark: we can just fetch it from the LAVA server on every boot rather than having it in the rootfs, but it's kind of lame
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<tarceri>
mareko: it dependeds at what stage in the linked you are talking about. We must remove what we can before validation because we have seen in the past games use declare more varying than is valid so the shaders only work if we remove the dead ones
<tarceri>
We also remove them so the other stages know what is used and not used, and we can do further optimisations if they are not used. Does your optimisation pass work across stages?
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<TimurTabi>
I'm trying to build Mesa 22.3 on Ubuntu 20, and I'm running into a lot of issues with outdated dependencies. I've worked around most of them, but this one has me stumped, "Message: libdrm 2.4.110 needed because amdgpu has the highest requirement". I'm building on a system that has only Nvidia hardware, so I don't care about amdgpu. How do I tell the build to ignore amdgpu?
<airlied>
TimurTabi: set -Dvulkan-drivers and -Dgallium-drivers to not include amd drivers
<TimurTabi>
Eh, how exactly do I do that?
<kisak>
it's less hassle to just build new enough libdrm