<androidui>
how exactly does a virtio-pci device (such as virtio-pmem) communicate with a virtio-pmem driver via virtio-over-pci ?
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<swardokplec>
I assume that permutations and combinations are not the same thing. Likely one of them allows/considers collisions and another does not. But i do not remember clearly which one. But the paradigm can be tested , and i expect the outcome to come similar as to how i stated, that all the alu collision spectrum can base on the more sparsely removed adder collision spectrum, but it is tough
<swardokplec>
logics behind the theory, immediate reactions coult trigger opinions that i am insane indeed, however this is likely as with other scientists who did the number theory not so. So you just test my words on cpu and move to DMA after the theory is validated. I do the same thing btw.
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<swardokplec>
As it will also lead to a filesystem as of storing such minified powers and just having dma encoder decoders, all becomes opened up, there is a path for secure and performance and low power protocols immediately making anything possible. Then you get the real idea as how human worth becomes less and less and even more so if you do not practice, robots start to take over, human designed
<swardokplec>
the computers to be too capable, but those were very bright humans from the head, not all can keep up with the smartest ones works later on, but it's not about moral side of that all, such outcomes are possible whether good or bad depends overall on many factors.
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<swardokplec>
microtubules in anatomy is yes something that manipulates with sensory nerve feedbacks.
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<swardokplec>
I've been having a good rest in the country side my own, some of the logics appeared to signal towards more of reality paths. However i think one can find a solver that does such things already, like find all permutations of a set that was stashed to a bigger number, now eliminate some of the numbers and combine, you could very fast kickstart a executable code that way. But i have not
<swardokplec>
looked at this lately, with one friend i just talked that classical debuggers would not forward such info, but some solvers likely would , needs touch more research.
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<swardokplec>
cheers.
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<Lynne>
managed to crash glslang
<Lynne>
I think we've succeeded in running code on GPUs, just not writing code that runs on GPUs
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<colinmarc>
I'm currently reading about GPU (para-)virtualization (@demi I just watched your talk about Xen, that was super helpful, thank you!). I have a question about SR-IOV. Given that consumer nvidia cards seem to have hardware support for SR-IOV, is there a future where nvk/noveau support it? Or is that off the table for some reason?
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<karolherbst>
colinmarc: needs somebody to write the code
<androidui>
does anyone know how to implement a virtio-over-pci device ?
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<DemiMarie>
Colin Marc: You're welcome! karolherbst is correct that someone would need to write the code. Also, there are concerns that the feature might have gotten no testing and so be broken in a security-relevant way.
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<colinmarc>
cloud providers presumably use it, no?
<karolherbst>
cloud providers don't use nouveau
<colinmarc>
ah, I thought "the feature" meant sr-iov
<karolherbst>
ohh, sure
<karolherbst>
but if nouveau implements it and nobody uses it, it's kinda meaningless
<colinmarc>
makes sense
<karolherbst>
it's quite low on the priority list, because there are way more critical things to work on for the time being, maybe long-term at some point once things are figured out
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<colinmarc>
that also makes sense :) I was asking in case the answer was like "licensing means that'll never be a thing" or something
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<DemiMarie>
karolherbst: Is Nouveau ready for serious use on recent cards, or will that need to wait for Nova?
<DemiMarie>
Colin Marc: Cloud workloads using Nvidia GPUs need the blobby stack for CUDA.
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<DemiMarie>
Colin Marc: Have you considered native contexts?
<colinmarc>
<DemiMarie> "Colin Marc: Have you considered..." <- In your talk you said malicious or broken code could reset the whole host GPU with native context, but that's not the case with SR-IOV - or did I misunderstand that? Otherwise the native context stuff seems really cool
<colinmarc>
I don't really understand how sr-iov would prevent that, so I probably just misunderstood it
<DemiMarie>
Colin Marc: SR-IOV *may* do better at containing the impact of a fault. This depends *entirely* on the GPU hardware and firmware.
<colinmarc>
I'm trying to read between the lines here, but if google/aws use SR-IOV for gpu instances they must feel reasonably good about it?
<DemiMarie>
The only major cloud I know of that offers SR-IOV VFs is Azure.
<DemiMarie>
I suspect Microsoft's answer is to have a support contract with the GPU vendor.
<colinmarc>
then I really misunderstood something. do you mean "offer" in the sense of they let you use SR-IOV? or they partition their GPUs into "GPU instances" with SR-IOV behind the scenes?
<DemiMarie>
The latter I think
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<DemiMarie>
What is your use-case? On desktop denial of service is often more of a reliability issue than a security issue.
<colinmarc>
so one question would be, what kind of GPUs would I need, and could I actually run them in a meaningfully multitenant way
<colinmarc>
it's closer to the "I'm a cloud provider and want to offer gpu instances" than the desktop case, since I have to assume remote code execution probably
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<DemiMarie>
Personally, I would run that on top of an actual cloud provider and pass the costs to the user. That makes the cloud provider responsible for security.
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<DemiMarie>
Specifically GPU security
<colinmarc>
that's probably not really tenable, because of cost and because of how AI has changed the cloud gpu landscape
<DemiMarie>
Azure has instances specifically for VDI (Virtual Desktop Infrastructure).
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<colinmarc>
but my background is in cloud infra so I'm not that scared of running computers/vms actually... and also I'm just doing research at the moment :)
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<DemiMarie>
The big cloud providers will do things like conduct white-box security audits of vendor firmware and build custom hardware specifically for their needs.
<colinmarc>
since you're warning me off this, what do you see as the biggest threat in terms of gpu security? assuming single-tenant for now
<colinmarc>
(that is, 1:1 gpus-VMs)
<DemiMarie>
For PCI passthrough: hardware infection
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<DemiMarie>
It's trivially easy to prevent with custom board designs and very hard to prevent otherwise.
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<colinmarc>
would you mind pointing me to an example exploit so I can read up on it?
<DemiMarie>
I don't know of one actually, but I do know that vBIOS locks have been defeated.
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<DemiMarie>
The OpenStack docs have a good explanation of what hardware infection is.
<DemiMarie>
I do wonder what Google Stadia used before it was shut down.
<colinmarc>
they had custom amd gpus made
<colinmarc>
and used SR-IOV
<colinmarc>
based on something I read today
<DemiMarie>
That would not surprise me at all.
<colinmarc>
native context would be better than PCI-passthrough even for a single tenant, then, if I want to avoid hardware infection
<DemiMarie>
Correct
<DemiMarie>
Also weekly kernel updates (so low uptimes).
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<colinmarc>
thanks for the input!
<DemiMarie>
You're welcome!
<DemiMarie>
What is your intended user base for this?
<colinmarc>
this is getting off-topic :) I'll DM you if that's ok
<DemiMarie>
Sure
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<markieiole>
So the hardware can not supposedly be allowed to make any mistakes on the bus proportions be that digital or analog, cause all is mathematically proven, so first operand is rounded to the closest real power of two which by the way is so , because the next, not previous closest power comes closer to with any number of previous powers yielding a result distance away from next power. In which
<markieiole>
case to get the next possible value that is unique is where first operand is concrete power manipulated and second operand is verbatim. This would give the correct result from alu, so considering alus multiply op becomes pinned to the hash yielding round about 1k*1k combinations, so i expect single alu to cost round about one million times 5 storage, so without intrinsics the storage
<markieiole>
needed starts somewhere from 22bits, so that does fit only 800 alu banks roughly, using intrinsic, you can stretch the precision supposedly, and fit as many 800banks as needed limited to max-1k-storage allocated for index and bases. so with intrinsics you could stich max/5thousand which is already 858993, i.e nearing to a million times 800 alus so it is now maxing up 687million alus , so
<markieiole>
with intrinsics it is getting more executions , a wider range of executed alus, it's like on a telescope or so to speak supervision in terms of throughput on lower storage requirements at the same time. all together it is expected that there is 1million unique non collision based answers per alu with a large but not so large possible error without even testing it. the error can be maximum
<markieiole>
million off as to how i see, but it does not matter. it is close enough so never wrong answers are possible, so maximum precision, i understand such theories not the ones you do, that is why i am different "a bit".
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