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<damo22> i have an existing linear framebuffer set up by grub, and i want to use it as a mesa surface. What do i need to implement? I looked in libdrm and found omap driver that looks pretty simple but it doesnt refer to anything drawing to the screen, it only mentions buffers and how to allocate them
<damo22> i get that drm passes ioctls to hardware for acceleration, but i dont need any of that, i just have a fb
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<airlied> damo22: what do you mean by a mesa surface?
<airlied> the only think I can think off is simpledrm
<damo22> for example, can i use the linear framebuffer as a place to draw opengl swrast
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<airlied> yeah then I think you just want simpledrm
<damo22> i dont have a linux kernel
<airlied> then you should get one of them first :-P
<damo22> im implementing this for GNU/Hurd
<damo22> we already have an existing framebuffer set up with a width and height, and a video memory address
<damo22> ideally we could port drm from the linux kernel but im not ready to attempt all that, it should be possible to implement swrast backed by a dumb framebuffer
<airlied> what API do you want to access mesa with though? OpenGL, Vulkan?
<airlied> you need something to bind the "framebuffer" to the API
<damo22> could i implement the gbm interface?
<airlied> yeah gbm seems like where you'd do it
<airlied> but without any sort of vblank or pageflip it'll tear
<damo22> so i would swap out the gbm_dri with a gbm_dumbfb
<airlied> someone else might have a better clue if you hang around, maybe someone from weston or another compositor
<damo22> i thought i could implement a dummy drm driver, that would allocate buffers in cpu memory instead of using gpu
<airlied> that might be easier
<damo22> but i cant seem to find any calls that actually draw anything
<airlied> well you don't need calls to draw anything in the kernel if it's all in software
<damo22> it needs to write the memory to the framebuffer though to make it appear on the screen
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<airlied> I think we usually do writes to the frontbuffer in the kernel using dirty handlers
<damo22> what is an example of an ioctl that writes to the frontbuffer
<airlied> drm_mode_fb_dirty_cmd
<airlied> sw renders to the buffer, and that will sync dirty regions to hw
<airlied> I think we must have some use case that direct renders to the scanout, but I'm not exactly sure what that looks like
<damo22> ok thats helpful
<damo22> could i implement page flipping in software by copying a complete frame from another memory location?
<airlied> yup
<damo22> :D
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<dualperform> what i think is the win comes compared to hw, that the result can yield a smaller value, so how the hw sees it, is that we have no 33+1 but have 34+2, and inverted index causes a invariant sum, so it sorta like uses the offset from collisions even if we never use a count based resulting, the internal adder of sub and add would count the offset. and decoder would add the weights, so i
<dualperform> would not see where the entropy comes from if you pin the results correctly, it's more like lynne told, that those guys were so hell of a smart they preserved a large entropy in the hw for the sake of the future gates and this scenario is more plausible than that being a side effect of electron shells being too small to be not doing it. But my explanations are not so understandable as i
<dualperform> have noticed. But Claude Elwood Shannon is no longer alive, maybe Peter Shor or someone more experienced could try to explain this. The way i see is that it can shift the spectrum by having vision to the both sides of the polarities, hence i would expect the sw sides of things to have no entropy if you order the results at correct indexes, empirical entropy aka Shannon entropy, they
<dualperform> regard him as the informatics father, likely was an amazing man as how it seems.
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<alyssa> glehmann: so I did start looking into int16 stuff and ugh it's turning into a mess
<alyssa> giant pile of patterns for things like `u2u16(iadd(x, y)) -> iadd(u2u16(x), u2u16(y)`
<alyssa> but for iadd/isub/imul/ixor/iand/ior/inot/ineg (at least)
<alyssa> and really u2u16 also u2u32 for x is 64
<alyssa> and really why not u2u16 with x 64? idk if llvm generates that ever
<alyssa> and then we really *do* need to do something about shifts. not sure how to get around the current sm5 definition but yeah
<alyssa> and fundamentally the problem here is C's stupid constant promotion rules means that CL C code that uses exclusively 16-bit, actually uses 32-bit with a gigantic pile of conversions
<alyssa> and I'm.. trying to figure out if nir_opt_algebraic is even the right tool for the job, vs some clever handrolled pass
<alyssa> we can generate all the permutations but if it turns into 100+ patterns, that seems... substantial
<alyssa> and then 8-bit is a whole other can of worms, that I won't open because AGX doesn't have real 8-bit arithmetic (so these patterns would just undo the 16-bit lowering) and because 8-bit arithmetic is mostly pointless on Mali which does have it
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<alyssa> I can't tell how much of this is "not useful for other backends" vs just "nobody is very focused on OpenCL"
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<alyssa> I could easily believe that HLSL/GLSL does't hit any of this and it's only CL C because of the const promotion rule
<alyssa> er, integer promotion rather
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<alyssa> https://reviews.llvm.org/D133668 has some interesting discourse
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<karolherbst> alyssa: yeah.. austriancoder ran into the same issue, but undoing integer promotion is a huge pita
<karolherbst> for some operations it's super safe e.g. add
<karolherbst> but for others it's not
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<karolherbst> though.... if all operands are converted then maybe it's fine
<karolherbst> the biggest problems just arise if you have constants in the mix
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<austriancoder> alyssa: it's fun
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<austriancoder> Vivante can do 8-bit arithmetic
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<alyssa> austriancoder: don't bother, it's not worth it :shrug:
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<alyssa> well that's... exciting
<alyssa> "can't run CTS, ethernet driver panicked"
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<zmike> CTS has to connect to the khronos servers to verify that you have a legiimate vulkan installation
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<alyssa> ah yes forgot about the DRM
<pinchartl> whaaat ? the CTS can't be run freely ? :-(
<alyssa> pinchartl: zmike and i were doing sarcasm
<zmike> sometimes I ask myself whether I have shitposted too hard
<zmike> then I shitpost harder
<Ermine> You can never shitpost too hard I'd say
<pinchartl> :-)
<pinchartl> you scared me for a moment
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* Ermine wants more DRM puns
<MTCoster> How about... more DRMa?
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<daniels> in the future we'll be able to transfer dEQP to the device through vibes and good intentions, but itmt we're stuck with NFS
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<DemiMarie> dEQP?
<daniels> DemiMarie: not being funny, but the search engine of your choice should tell you exactly what dEQP is
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<alyssa> daniels: oh ye I get it, I just was not expecting a kernel panic in an ethernet driver of all things xD
<alyssa> I think I once panicked btrfs...
<alyssa> and it was going so well
<alyssa> "it?" "running x86_64 dEQP-VK on an arm64 box"
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<sima> alyssa, the kernel has other duties than to panic for max entertainment?
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<alyssa> sima: well sometimes it needs to hang without panicking
<sima> ah right
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<Ermine> Kernel wants to rest sometimes
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<DemiMarie> daniels: sorry, the way you wrote your sentence made dEQP seem more exotic than it is
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<dcbaker> zmike: I heard that you wanted to push the release by another week?
<zmike> dcbaker: I think so cc Danct12
<zmike> daniels:
<daniels> yes please
<dcbaker> that pushes the release back almost a month, in a three month cycle, and means that we'll be trying to do RC work during US Thanksgiving
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<dcbaker> zmike, daniels: is this related to the wayland-protocols changes?
<daniels> why does it add a month?
<daniels> or do you mean that adding a week makes the delays, cumulatively, a month
<dcbaker> mumulatively
<dcbaker> *cumulatively
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<dcbaker> We already pushed the branchpoint two weeks out to today, it was originally planned for the 16th
<daniels> ack
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