<DavidHeidelberg[m]>
shawnguo Hey, thanks for the "[v2] soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment" building kernel with it right now, hopefully it'll replace my revert of "soc: qcom: mdt_loader: Support loading non-split images"
<shawnguo>
DavidHeidelberg[m]: no problem, it would be great if it fixes your problem as well
<DavidHeidelberg[m]>
just tested :) works as expected
<DavidHeidelberg[m]>
I'm writing to ML, if it gets into stable, it would be also amazing (at least up to 5.10)
<shawnguo>
so what's your device? also a Sony phone?
<DavidHeidelberg[m]>
Nexus 7 2013 (apq8064)
<DavidHeidelberg[m]>
just sent a mail to ML
<shawnguo>
Ah, okay, so it's not only Sony firmware files, thanks for testing!
<DavidHeidelberg[m]>
np, I can finally drop the revert from my working tree :)
<DavidHeidelberg[m]>
anyone with operating-points-v2 knowledge?
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<dgigantino>
hi!
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<Marijn[m]>
lumag, bamse: Looking into the DSI PLL XO/reference clock now; all DTs pass a mandatory `"ref"` clock already, but nothing uses it. `dsi-phy-common.yaml` describes this as `Board XO source` and I'm fairly certain it's the clock we should use, meaning this is only a `.fw_name = "ref"` change in the PLL drivers (no DT/dt-bindings changes necessary). This will need validation/testing (I don't own [or have mainline running properly on] all
<Marijn[m]>
platforms) as we observed many platforms running fine already without a proper reference clock (hence proper parent rate to use in calculations). This also makes it complicated to validate that the current clocks set in DT "ref" are the desired ones to use.
<lumag>
Marijn[m]: I think all current platforms use standard clock of 19.2 MHz.
<lumag>
Thus it was but that
<lumag>
Important up to now
<lumag>
Got Nexus 7 LTE (deb) btw. Will try using it in the next few days.
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<Marijn[m]>
lumag: That doesn't seem to be the case everywhere. apq8064 (`qcom,dsi-phy-28nm-8960`) passes `&cxo_board` for its "ref" clock which runs at 19.2MHz, but the PLL driver requests "pxo" which runs at 27MHz.
<lumag>
Marijn[m]: yep. The suource also uses 27mhz in its calculations
<Marijn[m]>
lumag: So we'll need a DT change to use `pxo_board` as `"ref"` clock. Is there a reason for hardcoding these rates instead of reading them from the parent clock? Preparing for possible XO shutdown in the future?