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<aka_[m]> konradybcio: any chance you are there/
<aka_[m]> > <@ichernev:matrix.org> aka_:... (full message at https://matrix.org/_matrix/media/r0/download/matrix.org/JrcCmgqdUproMsxOKGXWtyas)
<aka_[m]> instead of 11f
<aka_[m]> uh it appears mmio read when clocks and bus is disabled ends in reboot
<aka_[m]> if LUT_DMA register returns 0x0 on HW_REV it means there is no reg_dma right?
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<aka_[m]> Do anyone know what does... (full message at https://matrix.org/_matrix/media/r0/download/matrix.org/hyQpwavtpFomSrqGLcTBjphM)
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<aka_[m]> PHY v2 appears to be 14nm and there byte_intf only appears on socs using dispcc with that so should be set by default
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