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<
konradybcio >
aka_: I believe these are bogus and just meant to say "please make sure somebody votes for DDR F_MIN"
14:11
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aka_[m] >
konradybcio: seems it doesn't matter much for me as 8976 might require SMP or something
14:11
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aka_[m] >
most of LM/s PPs DSSPP are same location like 8953
14:12
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aka_[m] >
just lacking some stuff like UBWC
14:12
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konradybcio >
I fear only lumag speaks this language here
14:14
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lumag >
aka_[m], they might be bogus. I based some of the bandwidths on the msm8953-mdss, but I could have missed unused ones.
14:15
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lumag >
Regarding 8953 vs 8976, there might be more differences. I think 56/76 do not have scaling in RGB planes.
14:16
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lumag >
And SMP implementation will be appreciated. My first goal is sorting out the LMs (IIRC they are not
_that_ versatile in MDP5 1.x as they are in later generations) and sorting out QSEED2 and RGB scaling.
14:17
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lumag >
konradybcio, BTW: any updates on LLCC voting?
14:17
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aka_[m] >
RGB scalling is in VP_0.RGB_1.SSPP ?
14:18
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aka_[m] >
ELDARION.MDSS_MDSS_TOP.MDSS.MDP.VP_0.RGB_2
14:18
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aka_[m] >
SCALE_CONFIG ADDRESS 0x0204 RW
14:20
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konradybcio >
lumag LLCC voting-where?
14:21
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lumag >
aka_[m], yes. However according to mdss fbdev driver some units do not support that scaling (or maybe it was too buggy).
14:21
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lumag >
I might be mistaken regarding 8x56/76
14:21
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lumag >
konradybcio, MDSS / DPU of course ;-)
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