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<apritzel> warpme: can you do me a favour and run: "sunxi-fel readl 0x3000024" on your two H313 boxes? According to this TF-A patch you mentioned bits[7:0] should tell the difference between the T507 and H616 CPU cluster control block
<warpme> sure. give me sec...
<warpme> here it is: https://controlc.com/b0758310
<apritzel> warpme: great, thanks! but are you sure that's not the other way around? (mainline TF-A chip ends with 00)
<warpme> argh: my mistake. I have both boxes now with closed cases and....i will put stickers with desc. here is correct (i hope) outputs: https://controlc.com/d0d7c106
<apritzel> warpme: many thanks, that matches now what I was hoping for!
<apritzel> warpme: so the plan would be to have two distinct DTs for both box versions, we will need this for the different PMICs
<warpme> btw: do you know from somwhere correct cpu opp for h313? I was looking on vendor dts and obviously see traditional Chinise style: 1416MHz opp has higher voltage than 1520MHz (for the same bin)
<apritzel> and ideally put both DTs in one U-Boot image and let the SPL pick the right one, depending on those bits from 0x3000024
<apritzel> warpme: I don't know about any "correct" OPPs
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<warpme> also - due different cpu opp for h616 and h313 probably good will be to have one sun50i-hx1x.dtsi (without cpu opp) and then sun50i-h616.dtsi and sun50i-h313.dtsi with dedicated cpu opps
<apritzel> we typically include CPU OPPs .dtsi's into the *board* .dts files, so that would not be needed
<apritzel> because technically the OPPs are per-board data, since cooling and board layout would affect the settings
<mripard> apritzel: in practice (for the pre-A64 SoCs at least), OPPs were always the same from one board to another
<mripard> and cooling would affect how long you can run with a particular OPP (so, thermal throttling), not the OPP itself
<MoeIcenowy> yes, opp is just a voltage-frequency pair
<apritzel> I see, and in practice I agree, but for the later SoCs we seem to include them per SoC
<MoeIcenowy> yes
<apritzel> sorry, per board
<MoeIcenowy> the major reason is to disable DVFS for some boards
<MoeIcenowy> that do not have its cpu-supply ready
<apritzel> I was scratching my head about this already: even when the kernel cannot adjust the voltage, it still seems to increase the frequency?
<apritzel> which sounds like it should be fixed somewhere in the kernel: only enabled DVFS if we have control over both voltage and frequency?
<MoeIcenowy> well a DT having no cpu-supply but DVFS table is technically wrong, I think
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<mripard> apritzel: yeah, indeed
<mripard> it always felt wrong to me too
<mripard> but I guess the argument is that you could have a fixed regulator that outputs at the maximum voltage required
<mripard> and that would work
<mripard> (still seems wrong to me)
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<mripard> I agree with MoeIcenowy, that's easy enough to fix by requiring cpu-supply and providing a fixed-regulator in such a case
<mripard> but that ship has probably sailed a long time ago, and fixing it now without breaking DT compat is not going to be easy to do
<apritzel> I agree, and indeed it does not seem to be a biggie to explicitly announce DVFS by including the opp.dtsi
<apritzel> ah yeah, I was wrong: cooling does not affect the OPPs, the temp sensor would (ideally) limit this automatically
<MoeIcenowy> mripard: I think some H3 boards really have a fixed regulator on HW
<MoeIcenowy> and then the DT just models it so
<gamiee> MoeIcenowy: Banana Pi M2+ have this kind of regulator, it can switch between two voltages.
<MoeIcenowy> gamiee: then it's not so fixed
<MoeIcenowy> but I think the original M2+ is totally fixed
<MoeIcenowy> in DT M2+ 1.2 regulator is a "gpio-regulator"
<MoeIcenowy> which can have its voltage toggled by toggling a GPIO
<gamiee> ah yes, you are right. Older revision is totally fixed. But I didn't seen the old version for a very long time.
<MoeIcenowy> gamiee: well I have one ;-)
<warpme> apritzel: re cpu opp in h3131/h616: i personally prefer when inheritance/overwrites of dtsi/dts follows hw specifics. IMHO cpu dvfs sets are SoC specific. Thermal safe OPP set/subset + cpu-vdd realisation is board specific. So imho soc difference should be covered by: sun50i-hx1x.dtsi (without cpu opp) and then sun50i-h616.dtsi and sun50i-h313.dtsi with dedicated cpu opp set covering all bins and allowable opps. Then board specific
<warpme> dts should (potentially) remove some unsafe oops (due thermal design) + address vdd-cpu regulator specifics. just my 0.02$
<apritzel> warpme: but isn't much easier to keep the one existing h616.dtsi (since they are the same die), add two separate sun50i-h{616,313}-cpu-opp.dtsi files (with just the OPPs), and then include the respective one from the board .dts?
<warpme> apritzel : this is exactly what i implemented currently :-p
<apritzel> ah, but you put both OPP sets in one file
<warpme> yeah. that why i fell baaaad with this ;-p
<warpme> basically - recently working on rk3588 - i like approach: base is waker soc (3588s) then richer 3588 inherits 3588s then boards are including one of such dtsi. I'm not sure is this applicable to h313 vs h616 as in don't know fuctionjal relation between them: a)subset/superset of b)functional the same with implementation difference
<warpme> probably it is not worth to touch already mainlined h616.dtsi... so that why i was lazy and went with multiple soc opp.dtsi include
<apritzel> from all we know the H313 is just a weaker bin of the H616, that's why that wouldn't justify a separate h313.dtsi
<apritzel> there were rumours that some video codecs were limited/fused off on the H313, but I don't know if this really happened
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<warpme> re h313 vs h616 video caps: my v.basic tests showing no difference (https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt)
<warpme>
<MoeIcenowy> I rememberthe RK world
<MoeIcenowy> have a rk3399-opp and op1-opp
<MoeIcenowy> and OP1 devices include rk3399-op1-opp.dtsi, e.g. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi#L10
<apritzel> warpme: if the WiFi chip uses that clock pin, that should be good
<warpme> apritzel : "if the WiFi chip uses that clock pin" - do you mean this soc gpio pin is wired to lpo pin of wifi module?
<warpme> in android dt is see following: https://controlc.com/8f61ad67
<warpme> pincontrol-0 points to https://controlc.com/bc691bd5
<warpme> so it looks wifi lpo is wired to PG10?
<apritzel> warpme: without a schematic I guess it's the best we can hope for. Take those Allwinner Android DTs with a grain of salt though.
<apritzel> looks like it: if you program PG10 to use mux 3, it will spit out the 32KHz clock on that pin, so you can use that where ever you need a 32KHz clock
<warpme> indeed: in android dt i see "allwinner,muxsel = <0x03>;" Can i use such entry also in mainline 6.2 dts?
<apritzel> no, not directly, but you can use something equivalent
<apritzel> we describe mux 3 for PG10 as "clock", so you describe that pin in a child of the pinctrl node (like all the other pins), and say: function = "clock";
<apritzel> and then reference this in your .dts, in the respective pinctrl-0 property
<apritzel> that should be in the wifi device's node, not in the mmc1 node, but I am not 100% sure that works
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<warpme> so for pindef: will this be ok: https://pastebin.com/4eSuDYRL line380 ?
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<warpme> and for dts: https://pastebin.com/37tUnZu9 line186?
<apritzel> yes, that's what I meant
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<LordKalma> did someone make any progress on the misterious chips that don't boot with gcc 12-built u-boot?
<LordKalma> just out of curiosity
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<warpme> apritzel : pre your request i'm updating axp313a to v10 for testing and v10 not applies cleanly on 6.2.9 for me. Do i miss something?
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<apritzel> that got already queued, so I based my post on top of it
<warpme> oh - it fails for me on axp20x_power_off hunk in drivers/mfd/axp20x.c
<warpme> v8 applies clean....
<apritzel> there series is based on 6.3-rc4-something
<apritzel> warpme: btw: I am almost done with a proper TF-A series to support the "T507-style" SoCs
<warpme> apritzel : sill no go in the same hunk. don't waste your time on this. i'll sort this tommorow!. Re: ATF perfect. Give me msg here - i'll test asap
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