<gamiee>
I assume that T536 is close to (A/T)527 ?
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<jernej>
It has ECC RAM, which means yet another DRAM driver :)
<gamiee>
(:
<jernej>
I'm not sure this SoC will be popular for SBCs since it's clearly designed for industrial applications
<jernej>
and I guess even no GPU?
<gamiee>
Yeah or automotive. Only G2D, no GPU
<gamiee>
Also, finally they switched to E902 instead of ARISC?
<jernej>
well, ARISC has very specific role in T527 or siblings, just for power management
<jernej>
E902 is imo too powerful for that
<gamiee>
yeah, but T527 have only E906, and for power management ARISC. For me it looks more that they finally migrated their ARISC firmware finally to E902, so they can use it instead.
<gamiee>
not sure how the power consumption difference is between ARISC and E902.
<apritzel>
jernej: it could actually be quite nice, since just four cores means less power consumption, and you only need one PMIC. And it has the dual MACs plus USB3/PCIe
<apritzel>
and yeah, feature-wise it looks like related to the A523, but I am not holding my breath, even a small number of details changed could mean quite some work. software wise
<gamiee>
yeah, as allwinner loves to change stuff ... :D
<jernej>
apritzel: sure, but such boards are not interesting to me :)
<apritzel>
jernej: you mean because it doesn't mention HDMI? ;-)
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<paulk>
mhh I've been trying to get jtag going for the A80 big core but nothing responds :(
<paulk>
pinmux on the PH8-10 pins looks good after setting via fel jtag-loop
<paulk>
also the CPUCFG bits for reset look good
<paulk>
I'm running out of ideas, if that rings a bell to anyone...
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<apritzel>
paulk: what do you mean with "jtag for the big core", exactly? The A80 boots from the A7 cluster, so you would first need to at least power gate the second cluster, I guess?
<paulk>
apritzel: essentially there's 3 set of pins for it: one for the a7 (works normally), one for the a15 and one for the openrisc (untested)
<paulk>
apritzel: it's not clear if the debug infrastructure should work with all cores of the cluster reset
<apritzel>
ah, I see. But I guess still there is no power of those cores, initially?
<gamiee>
if there are no power for those cores at boot up, I believe the JTAG transport module is not enabled as well, thus acting dead
<paulk>
mhh I only looked at the reset gating, maybe there's some power-related things
<paulk>
thanks!@
<paulk>
I guess I should try with a running system that has a15 enabled and just do the pinmux
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<paulk>
yep it works!
<paulk>
so I guess it won't be so easy to integrate the big core jtag with the fex-based jtag-loop
<gamiee>
fex-based jtag-loop?
<gamiee>
what are you trying to do?
<paulk>
gamiee: yeah there's a small program in sunxi-tools that just muxes the jtag pins, which is usually enough to access jtag via the microsd connector
<paulk>
gamiee: what I'm doing is writing openocd configs for sunxi chips
<gamiee>
paulk: Ooooh nice!
<gamiee>
ah and yeah, this script needs to turn on big cores to be fully functional
<loki666>
question: If I have someone doing the tests for my panfrost patch for others SoC (rk3326, rk3566 and aml S922X) can I post a Tested-By for him?
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<loki666>
or should I just report, without the Tested-By ?
<apritzel>
loki666: ideally you should convince him to reply on the list. If it's a technical problem, lore has instructions how to do this, even with say outlook, and if it's just a reply with a tag, mis-formatted or mangled mails don't matter too much
<apritzel>
if he doesn't want to do this for other reasons, you could just mention that his has been tested, in a reply or a cover letter
<loki666>
ok I'll try to convince him
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<montjoie>
for me you could add a xxx-by of someone, but you should CC him
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<wens>
paulk: there is a cluster power register, check arch/arm/mach-sunxi/mc_smp.c
<wens>
haven't looked at that code in a looong time
<Lightsword>
anyone know if "mv64xxx_i2c 5002c00.i2c: obtain a copy of previously claimed pinctrl" is something that could cause a "i2c i2c-1: mv64xxx: I2C bus locked, block: 1, time_left: 0" error?
<apritzel>
Lightsword: I think "bus locked" is often due to something like missing pull-ups, or I guess something wrong with the pins in general
<Lightsword>
apritzel, thinking something with i2c3_pa_pins? or something else is more likely?
<apritzel>
did you get it to work in U-Boot? As long as the clock don't turn off, you could get away with initialising the AC300 in U-Boot, then telling Linux to just go ahead: the PHY should be detected even without Linux having an AC200/AC300 driver
<Lightsword>
apritzel, not really, I mean I got as far as getting an ethernet light to come on but didn't actually function in uboot
<apritzel>
Lightsword: yeah, the I2C pins. I saw you having the pull ups configured there, but maybe worth experimenting with that a bit (like dropping the property)
<Lightsword>
apritzel, I tried removing the i2c3_ph_pins node, but not sure if that would change anything
<Lightsword>
hmm, yeah thinking the i2c bus must be misconfigured entirely, in uboot(using same device tree essentially) I get "i2c_mvtwsi i2c@5002c00: pinctrl_select_state_full: pinctrl_config_one: err=-2" when trying to manually scan it
<apritzel>
any other pinctrl doesn't matter, as long as you don't reference it
<apritzel>
for U-Boot you need to add {"i2c3", 2 } to sun50i_h616_pinctrl_functions[]
<apritzel>
.. if you expect the normal I2C U-Boot tools to work. I think that hack-patch does not really need it, since it's, well, a hack ;-)
<paulk>
mhh so with all a80 cores up I can read half of the jtag rom table with dap info, but it stops when reading the cpu-related entries and then I can no longer access the rom table
<paulk>
although the DAP is still alive and responding
<paulk>
so maybe some debug-specific reset/gating bits are needed
<gamiee>
paulk: does not it halt due it tries to read something what is not enabled?
<paulk>
gamiee: well everything should be enabled here
<paulk>
or some specific bits are needed to enable the debug units
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<gamiee>
strange... Sadly, IDK much about ARM debug architecture, as I worked only with RISC-V one.
<paulk>
mhh seems to be related to the rom table itself
<paulk>
if I use the same addresses as the a7 port I can control the cores normally
<paulk>
and the a15 cores address was easy to guess
<paulk>
so I guess there's one DAP per cluster but it's the same debug APB bus behind
<paulk>
way to waste silicon surface
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<apritzel>
Lightsword: U-Boot does not have any drivers for the AC200 devices, so the pinctrl driver probably doesn't get triggered. Maybe you need to manually scan that I2C bus ...
<Lightsword>
apritzel, seems both from linux/uboot the bus is dead/bugged, thinking maybe it's a misconfigured regulator maybe
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