alyssa changed the topic of #panfrost to: Panfrost - FLOSS Mali Midgard & Bifrost - Logs https://oftc.irclog.whitequark.org/panfrost - <macc24> i have been here before it was popular
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<bbrezillon>
alyssa: I'm not sure I understand how raw tile-buffer writes work on Midgard. Looks like the same fragout (brndout) instruction is used for both cases, the only difference being that raw writes happen in a blend shader, so I guess the FF blend unit is bypassed in that case and the output values are written directly to the tile buffer
<bbrezillon>
alyssa: ah, nevermind, if blend_shader and load_destination are false, blending is skipped and the output is written directly to the tile buffer (I guess the float -> unorm conversion still happens if internal_format != RAWxx)
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<warpme_>
guys: i'm trying to get working mali g31 on allwinner h616 (a "new" version of well working h6). i'm on mesa 21.1.1 and 5.12.7 kernel. all works perfectly on h6. but on h616 panfrost loads, reports reasonable caps. but when my app starting to use gpu i see in dmesg every 60sec logs like this:
<warpme_>
sure. let me try. btw: all works perfectly for h6 (h616 soc is in many aspects v.similiar to h6. also all works on my other soc with g31: amlogic sm1)
<bbrezillon>
assuming both your amlogic and allwinner SoC embed the same GPU (G31), and one works while the other doesn't, I'd bet on a kernel side issue (PM or cache related)
<warpme_>
bbrezillon: well - i have working well g31 but on dfferent soc (amlogic)
<warpme_>
bbrezillon: sorry. read your mgs too quick :-)
<warpme_>
as driver seems report ok caps - PM should be rather ok?
<macc24>
bbrezillon: i think if it would be pm it would either throw serror(look i learned new word :D) or just not render anything
<warpme_>
....or hang soc. h616 has undocumented bit in PM registers. without proper setting bits in those reg. modprobe of panfrost hangs soc.
<bbrezillon>
macc24: dunno what happens if the OPP are slightly off
<macc24>
bbrezillon: "if the OPP are slightly off"???????
<warpme_>
currently i disabled opp. gpu runs on safe 432MHz.
<warpme_>
also i tried increase vgpu to 1.08v
<warpme_>
maybe it is worth to try apply g52 cache-coherency on h616 (as soc quirk)?
<macc24>
warpme_: as a hack you can try changing compatible to amlogic,meson-gxm-mali in sun50i-h6.dtsi
<macc24>
but i don't know if it would make sense or not
<warpme_>
macc24: probably you mean "compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";" - this is what amlogic sm1 uses for working g31 ?
<macc24>
warpme_: yea whatever just amlogic,something-mali
<bbrezillon>
adding the dma-coherent prop should do the trick, I don't think you want the amlogic quirks
<macc24>
warpme_: ^
<narmstrong>
The dma coherent
<narmstrong>
Stuff was only for G52
<narmstrong>
I thought G31 didn’t support cache coherency
<narmstrong>
On amlogic, the G31 & G52 runs at a lower freq than the T820 and Mali450